Body-tied, strained-channel multi-gate device and methods of manufacturing same

Patent metadata

Field	Value
Publication number	US-9214554-B2
Application number	US-201514607977-A
Country	US
Kind code	B2
Filing date	Jan 28, 2015
Priority date	Jul 10, 2006
Publication date	Dec 15, 2015
Grant date	Dec 15, 2015

Abstract

A fin-FET or other multi-gate transistor is disclosed. The transistor comprises a semiconductor substrate having a first lattice constant, and a semiconductor fin extending from the semiconductor substrate. The fin has a second lattice constant, different from the first lattice constant, and a top surface and two opposed side surfaces. The transistor also includes a gate dielectric covering at least a portion of the top surface and the two opposed side surfaces, and a gate electrode covering at least a portion of the gate dielectric. The resulting channel has a strain induced therein by the lattice mismatch between the fin and the substrate. This strain can be tuned by selection of the respective materials.

First claim

What is claimed is:

1. A device comprising:
a semiconductor substrate having a first lattice constant;
a semiconductor fin extending directly and continuously from a top surface of the semiconductor substrate, the having a second lattice constant, the second lattice constant being different from the first lattice constant, the fin having a bottom surface disposed directly on the top surface of the semiconductor substrate, an opposite top surface and two opposed side surfaces, wh…

Assignees

• Taiwan Semiconductor Mfg

Inventors

• Lin Hong-Nien
• Lin Horng-Chih
• Huang Tiao-Yuan

Classifications

• H10D84/834

  Electricity · mapped topic

• H10D84/0193

  Electricity · mapped topic

• H10D84/0167

  Electricity · mapped topic

• H10D84/038

  Electricity · mapped topic

• H10D62/8325

  Electricity · mapped topic