Method for forming ReRAM chips operating at low operating temperatures

US9177996B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9177996-B2
Application numberUS-201314072611-A
CountryUS
Kind codeB2
Filing dateNov 5, 2013
Priority dateMar 14, 2013
Publication dateNov 3, 2015
Grant dateNov 3, 2015

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Forming a resistive memory structure at a temperature well above the operating temperature can reduce the forming voltage and create a defect distribution with higher stability and lower programming voltages. The forming temperature can be up to 200 C above the operating temperature. The memory chip can include an embedded heater in the chip package, allowing for a chip forming process after packaging.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising forming a memory structure, wherein the memory structure comprises an insulator layer disposed between two electrode layers; heating the memory structure to a temperature higher than an operating temperature of the memory structure; applying a first voltage to the two electrode layers to form a switching layer from the insulator layer; stopping heating the memory structure. 2. A method as in claim 1 wherein t…

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Next steps

Free tools are coming soon. Tell us what you want to track and we'll notify you.

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9177996B2 cover?
Forming a resistive memory structure at a temperature well above the operating temperature can reduce the forming voltage and create a defect distribution with higher stability and lower programming voltages. The forming temperature can be up to 200 C above the operating temperature. The memory chip can include an embedded heater in the chip package, allowing for a chip forming process after pa…
Who is the assignee on this patent?
Intermolecular Inc
What technology area does this patent fall under?
Primary CPC classification G11C13/0002. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).