Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
Method of forming protective material between semiconductor die stacked on semiconductor wafer to reduce defects during singulation
US9136144B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9136144-B2 |
| Application number | US-61787709-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 13, 2009 |
| Priority date | Nov 13, 2009 |
| Publication date | Sep 15, 2015 |
| Grant date | Sep 15, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A semiconductor wafer contains first semiconductor die. TSVs are formed through the semiconductor wafer. Second semiconductor die are mounted to a first surface of the semiconductor wafer. A first tape is applied to on a second surface of the semiconductor wafer. A protective material is formed over the second die and first surface of the wafer. The protective material can be encapsulant or polyvinyl alcohol and water. The wafer is singulated between the second die into individual die-to-wafer packages each containing the second die stacked on the first die. The protective material protects the wafer during singulation. The die-to-wafer package can be mounted to a substrate. A build-up interconnect structure can be formed over the die-to-wafer package. The protective material can be removed. Underfill material can be deposited beneath the first and second die. An encapsulant is deposited over the die-to-wafer package.
First claim
Opening claim text (preview).
What is claimed: 1. A method of making a semiconductor device, comprising: providing a semiconductor wafer containing a plurality of first semiconductor die; mounting a plurality of second semiconductor die to a first surface of the semiconductor wafer; placing a tape on a second surface of the semiconductor wafer opposite the first surface of the semiconductor wafer; forming a protective material over the second semiconductor die and first surface of the semiconductor wafe…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9136144B2 cover?
- A semiconductor wafer contains first semiconductor die. TSVs are formed through the semiconductor wafer. Second semiconductor die are mounted to a first surface of the semiconductor wafer. A first tape is applied to on a second surface of the semiconductor wafer. A protective material is formed over the second die and first surface of the wafer. The protective material can be encapsulant or pol…
- Who is the assignee on this patent?
- Lim Taegki, Yun Jaeun, Lee Sungyoon, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification H10W74/012. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).