Semiconductor die, semiconductor package and substrate dicing method
US-2024421000-A1 · Dec 19, 2024 · US
US9123797B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9123797-B2 |
| Application number | US-201414542905-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 17, 2014 |
| Priority date | Nov 21, 2013 |
| Publication date | Sep 1, 2015 |
| Grant date | Sep 1, 2015 |
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Official abstract text for this publication.
A wafer processing method for dividing a wafer into individual devices along a plurality of crossing division lines, including a frame preparing step of preparing a frame having a plurality of crossing partitions corresponding to the division lines of the wafer, a resin covering step of spreading a resin powder on the wafer and positioning the partitions of the frame in alignment with the division lines, thereby covering with the resin powder the regions of the wafer other than the regions corresponding to the division lines, a masking step of melting and curing the resin powder supplied to the wafer processed by the resin covering step and next removing the frame, thereby masking the regions other than the regions corresponding to the division lines, and an etching step of plasma-etching the wafer processed by the masking step to thereby divide the wafer into the individual devices along the division lines.
Opening claim text (preview).
What is claimed is: 1. A wafer processing method for dividing a wafer into individual devices along a plurality of crossing division lines formed on the front side of said wafer, said individual devices being formed in a plurality of separate regions defined by said division lines, said wafer processing method comprising: a frame preparing step of preparing a frame having a plurality of crossing partitions corresponding to said division lines of said wafer; a resin covering step…
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