Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure

Patent metadata

Field	Value
Publication number	US-9105532-B2
Application number	US-201414503698-A
Country	US
Kind code	B2
Filing date	Oct 1, 2014
Priority date	Jun 23, 2011
Publication date	Aug 11, 2015
Grant date	Aug 11, 2015

Abstract

A semiconductor device has a semiconductor die with a first conductive layer formed over the die. A first insulating layer is formed over the die with a first opening in the first insulating layer disposed over the first conductive layer. A second conductive layer is formed over the first insulating layer and into the first opening over the first conductive layer. An interconnect structure is constructed by forming a second insulating layer over the first insulating layer with a second opening having a width less than the first opening and depositing a conductive material into the second opening. The interconnect structure can be a conductive pillar or conductive pad. The interconnect structure has a width less than a width of the first opening. The second conductive layer over the first insulating layer outside the first opening is removed while leaving the second conductive layer under the interconnect structure.

First claim

What is claimed:

1. A method of making a semiconductor device, comprising:
providing a substrate;
forming an insulating layer over the substrate;
forming a first conductive layer into an opening of the insulating layer; and
forming an interconnect structure including a first width within the opening and below a surface of the insulating layer and a second width less than the first width outside the opening of the insulating layer.

2. The method of clai…

Assignees

• Stats Chippac Ltd

Inventors

• Choi Won Kyoung
• Marimuthu Pandi C

Classifications

• H10W74/00

  Electricity · mapped topic

• H10W72/9415

  Electricity · mapped topic

• H10W72/07236

  Electricity · mapped topic

• H10W72/07232

  Electricity · mapped topic

• H10W72/01938

  Electricity · mapped topic