Method of manufacturing a semiconductor device including alignment mark

Patent metadata

Field	Value
Publication number	US-9018073-B2
Application number	US-201313749019-A
Country	US
Kind code	B2
Filing date	Jan 24, 2013
Priority date	Apr 18, 2012
Publication date	Apr 28, 2015
Grant date	Apr 28, 2015

Abstract

A method of manufacturing a semiconductor device includes: forming a recessed portion in a semiconductor substrate; forming an insulating film in the recessed portion; after forming the insulating film, forming a silicide layer on the semiconductor substrate in contact with the insulating film; and performing alignment between an electron beam exposure apparatus and the semiconductor substrate by using the insulating film and the silicide layer as an alignment mark.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, the method comprising:
forming a first recessed portion in a first region between a plurality of chip regions on a semiconductor substrate;
forming a first insulating film in the first recessed portion;
after forming the first insulating film, forming a first silicide layer directly on the semiconductor substrate in the first region, the first silicide layer being in contact with the first insulating film…

Assignees

• Fujitsu Semiconductor Ltd

Inventors

• Kawano Makoto
• Yoshida Shigeki

Classifications

• H10D64/0112

  Electricity · mapped topic

• H10W46/503

  Electricity · mapped topic

• H10W46/301

  Electricity · mapped topic

• H10W46/101

  Electricity · mapped topic

• H10W20/081

  Electricity · mapped topic