Voltage regulation using a delta-sigma modulator, device and method
US-2023195151-A1 · Jun 22, 2023 · US
US9007247B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9007247-B2 |
| Application number | US-201213548069-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 12, 2012 |
| Priority date | Dec 19, 2007 |
| Publication date | Apr 14, 2015 |
| Grant date | Apr 14, 2015 |
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A sigma-delta modulator for an ADC, passes an input signal to a loop filter, then to a multi-bit quantizer of the modulator. An output of the quantizer is passed to a digital filter, and a feedback signal is passed back to the loop filter, the feedback signal having fewer bits than are produced by the multi-bit quantizer. The digital filter has an order greater than one in the passband of the sigma-delta modulator.
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The invention claimed is: 1. A sigma-delta modulator comprising: a summing stage for generating an error signal as a difference between an input signal and a feedback signal; a loop filter coupled to an output of the summing stage for filtering the error signal; a multi-bit quantiser coupled to an output of the loop filter for quantising the filtered error signal; and a digital filter coupled to an output of the multi-bit quantiser; a feedback path coupling an output of the digital filter to the summing stage for providing the feedback signal to the summing stage, the feedback signal having fewer bits than a number of bits produced by the multi-bit quantiser; wherein the difference in gain of the digital filter inside and outside of a passband of the sigma-delta modulator is greater than or equal to 20 log 10((2y−1)/(2z−1)) dB, where y is the number of bits of the feedback signal and z is the number of bits of the multi-bit quantiser. 2. The sigma-delta modulator of claim 1 , the digital filter having a gain not exceeding one outside a passband of the digital filter. 3. The sigma-delta modulator of claim 1 , the digital filter having an order greater than one in the passband of the sigma-delta modulator. 4. The sigma-delta modulator of claim 1 , wherein there is no other feedback path coupling the output of the digital filter to an input of the digital filter. 5. The sigma-delta modulator of claim 1 , wherein the frequency response of the combination of the loop filter and the digital filter has a first order roll-off of gain outside of the passband of the sigma-delta modulator. 6. The sigma-delta modulator of claim 1 , comprising a 1-bit quantiser coupled to the output of the digital filter for generating the feedback signal as a 1-bit feedback signal. 7. The sigma-delta modulator of claim 6 , the 1-bit quantiser being arranged to feed back a most significant bit of an output of the digital filter. 8. The sigma-delta modulator of claim 1 , wherein the feedback path includes a digital-to-analogue converter. 9. The sigma-delta modulator of claim 1 , the loop filter comprising any of a continuous time filter, a switched capacitor filter, or a digital filter. 10. The sigma-delta modulator of claim 1 , the loop filter comprising a filter of order greater than one. 11. The sigma-delta modulator of claim 1 , the loop filter comprising an integrator. 12. The sigma-delta modulator of claim 1 , the loop filter and the digital filter having a bandpass amplitude response. 13. An analogue-to-digital converter having the sigma-delta modulator of claim 1 and a further digital filter coupled to the output of the digital filter. 14. A sigma-delta modulator comprising: a summing stage for generating an error signal as a difference between an input signal and a feedback signal; a loop filter coupled to an output of the summing stage for filtering the error signal; a multi-bit quantiser coupled to an output of the loop filter for quantising the filtered error signal; a digital filter coupled to an output of the multi-bit quantiser; and a feedback path coupling an output of the digital filter to the summing stage for providing the feedback signal to the summing stage, the feedback signal having fewer bits than a number of bits produced by the multi-bit quantiser, wherein the frequency response of the digital filter has a substantially flat gain outside of the passband of the sigma-delta modulator. 15. The sigma-delta modulator of claim 14 , the digital filter having a gain not exceeding one outside a passband of the digital filter. 16. The sigma-delta modulator of claim 14 , the digital filter having an order greater than one in the passband of the sigma-delta modulator. 17. The sigma-delta modulator of claim 14 , wherein there is no other feedback path coupling the output of the digital filter to an input of the digital filter. 18. The sigma-delta modulator of claim 14 , wherein the frequency response of the combination of the loop filter and the digital filter has a first order roll-off of gain outside of the passband of the sigma-delta modulator. 19. The sigma-delta modulator of claim 14 , comprising a 1-bit quantiser coupled to the output of the digital filter for generating the feedback signal as a 1-bit feedback signal. 20. The sigma-delta modulator of claim 19 , the 1-bit quantiser being arranged to feed back a most significant bit of an output of the digital filter. 21. The sigma-delta modulator of claim 14 , wherein the feedback path includes a digital-to-analogue converter. 22. The sigma-delta modulator of claim 14 , the loop filter comprising any of a continuous time filter, a switched capacitor filter, or a digital filter. 23. The sigma-delta modulator of claim 14 , the loop filter comprising a filter of order greater than one. 24. The sigma-delta modulator of claim 14 , the loop filter comprising an integrator. 25. The sigma-delta modulator of claim 14 , the loop filter and the digital filter having a bandpass amplitude response. 26. The sigma-delta modulator of claim 14 , wherein the difference in gain of the digital filter inside and outside of the passband of the sigma-delta modulator is greater than or equal to 20 log 10((2y−1)/(2z−1)) dB, where y is the number of bits of the feedback signal and z is the number of bits of the multi-bit quantiser. 27. An analogue-to-digital converter having the sigma-delta modulator of claim 14 and a further digital filter coupled to the output of the digital filter. 28. A method of converting a signal comprising, in a sigma-delta modulator: generating an error signal as the difference between an input signal and a feedback signal; filtering the error signal; quantising the filtered error signal using a multi-bit quantiser; filtering the quantised and filtered error signal using a digital filter; and generating the feedback signal from an output signal of the digital filter, wherein the feedback signal has fewer bits than a number of bits produced by the multi-bit quantiser; and wherein the difference in gain of the digital filter inside and outside of a passband of the sigma-delta modulator is greater than or equal to 20 log 10((2y−1)/(2z−1)) dB, where y is the number of bits of the feedback signal and z is the number of bits of the multi-bit quantiser. 29. A method of converting a signal comprising, in a sigma-delta modulator: generating an error signal as the difference between an input signal and a feedback signal; filtering the error signal; quantising the filtered error signal using a multi-bit quantiser; filtering the quantised and filtered error signal using a digital filter; and generating the feedback signal from an output signal of the digital filter, wherein the feedback signal has fewer bits than a number of bits produced by the multi-bit quantiser; and wherein the frequency response of the digital filter has a substantially flat gain outside of the passband of the sigma-delta modulator.
with weighted feedforward summation, i.e. with feedforward paths from more than one filter stage to the quantiser input · CPC title
characterised by the number of quantisers and their type and resolution · CPC title
with lower resolution, e.g. single bit, feedback · CPC title
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