Method for integrated circuit fabrication

Patent metadata

Field	Value
Publication number	US-8980108-B1
Application number	US-201314045963-A
Country	US
Kind code	B1
Filing date	Oct 4, 2013
Priority date	Oct 4, 2013
Publication date	Mar 17, 2015
Grant date	Mar 17, 2015

Abstract

Provided is an integrated circuit (IC) fabrication method. The method includes receiving a mask, the mask having a plurality of dies and receiving a wafer, the wafer having a resist layer. The method further includes exposing the resist layer using the mask with a fraction radiation dose thereby forming a first plurality of images; re-positioning the mask relative to the wafer; and exposing the resist layer using the mask with another fraction radiation dose. A second plurality of images is formed, wherein a portion of the second plurality of images is superimposed over another portion of the first plurality of images.

First claim

What is claimed is:

1. A method comprising:
receiving a mask and a wafer, wherein the mask includes a plurality of units and each of the units corresponds to a first pattern of an IC and the wafer includes a first substrate and a first resist layer over the first substrate;
performing a first exposure to the first resist layer using the mask thereby forming a first plurality of images on the first resist layer, wherein the first exposure uses a first radiation dose that is less than a full radiation dose and each of the first plurality of images corresponds to one of the units; and
performing a second exposure to the first resist layer using the mask thereby forming a second plurality of images on the first resist layer, wherein the second exposure uses a second radiation dose that is less than the full radiation dose; each of the second plurality of images corresponds to one of the units; and a second portion of the second plurality of images is superimposed over a first portion of the first plurality of images,
wherein the first radiation dose and the second radiation dose are at least 1/N of the full radiation dose each, wherein N is the number of the units.

2. The method of claim 1 , wherein the first and second exposures utilize an extreme ultraviolet (EUV) radiation.

3. The method of claim 1 , wherein a unit represents an image for a single die to be formed on the wafer.

4. The method of claim 1 , wherein the first substrate includes silicon.

5. The method of claim 1 , further comprising:
repeating the performing the second exposure until at least one of the first plurality of images has been exposed to at least the full radiation dose;
developing the first resist layer; and
etching the first substrate using the developed first resist layer as an etch mask.

6. The method of claim 1 , wherein the plurality of units are arranged in an array with M columns and N rows.

7. The method of claim 6 , wherein:
the M is 3 and the N is 3;
the first radiation dose is about one third of the full radiation dose;
the second radiation dose is about one third of the full radiation dose;
the first portion is two thirds of the first plurality of images; and
the second portion is two thirds of the second plurality of images.

8. The method of claim 1 , wherein the first radiation dose is about the same as the second radiation dose.

9. The method of claim 1 , wherein the mask is an EUV mask and the plurality of units includes at least one phase defect.

10. The method of claim 9 , wherein:
the plurality of units includes a first unit and a second unit;
the first unit includes a phase defect at a location of the first unit corresponding to a first location of the first pattern;
the second unit is substantially free of phase defects at a location of the second unit corresponding to the first location of the first pattern;
a first image of the first portion corresponds to the first unit;
a second image of the second portion corresponds to the second unit; and
the second image is superimposed over the first image.

11. The method of claim 9 , wherein the at least one phase defect is one of: a bump defect and a pit defect.

12. A method comprising:
receiving a mask, wherein the mask is patterned with a first pattern of an IC to form a plurality of units, a first one of the units includes defects at a first location, a second one of the units is substantially defect-free at a second location, and the first and second locations correspond to a common location of the first pattern;
receiving a wafer, wherein the wafer includes a first substrate and a first resist layer over the first substrate;
performing a first exposure to the first resist layer using the mask with a first fractional radiation dose thereby forming a first plurality of images on the first resist layer, wherein a first one of the images is exposed with the first unit;
positioning the mask relative to the wafer such that a second exposure to the first resist layer using the mask would superimpose an image of the second unit over the first image for mitigating printing effects by the first unit; and
performing the second exposure with a second fractional radiation dose.

13. The method of claim 12 , wherein the first and second fractional radiation doses are at least 1/N of a full radiation dose each wherein the N is the number of units on the mask.

14. The method of claim 12 , wherein the second fractional radiation dose is about the same as the first fractional radiation dose.

15. The method of claim 12 , further comprising:
repeating the positioning operation and the performing the second exposure until at least one of the first plurality of images has been exposed to at least a full radiation dose;
developing the first resist layer; and
etching the first substrate with the developed first resist layer as an etch mask.

16. The method of claim 12 , wherein the first substrate includes silicon.

17. The method of claim 12 , wherein the mask is a EUV mask and the defects are phase defects.

18. A method comprising:
receiving a EUV mask, wherein the EUV mask includes a plurality of die-layer images (dies) and each die is patterned with a first pattern of an IC;
receiving a wafer, wherein the wafer includes a silicon substrate and a first resist layer over the silicon substrate;
performing a first exposure to the first resist layer using the EUV mask with a first radiation dose thereby forming a first plurality of images on the first resist layer, wherein the first radiation dose is less than a full radiation dose;
positioning the EUV mask relative to the wafer such that a second exposure to the first resist layer using the EUV mask would superimpose at least one of the first plurality of images;
performing the second exposure with a second radiation dose, wherein the second radiation dose is less than the full radiation dose; and
repeating the positioning operation and the performing the second exposure until at least one of the first plurality of images has been exposed to at least the full radiation dose.

19. The method of claim 18 , further comprising:
developing the first resist layer; and
etching the silicon substrate with the developed first resist layer as an etch mask.

20. The method of claim 18 , wherein:
the plurality of dies includes a first die and a second die;
the first die includes a phase defect at a location of the first die corresponding to a first location of the first pattern;
the second die is substantially free of phase defects at a location of the second die corresponding to the first location of the first pattern;
a first image of the first plurality of images is an image of the first die;
a second image from the second exposure is an image of the second die; and
the second image is superimposed over the first image by the second exposure.

Assignees

• Taiwan Semiconductor Mfg

Inventors

• Yu Ching-Fang
• Hsu Ting-Hao
• Huang Chia-Ching

Classifications

• H10P76/2041

  Photolithographic processes · CPC title

• H10P50/696

  Process specially adapted to improve the resolution of the mask · CPC title

• H10P50/20

  Dry etching; Plasma etching; Reactive-ion etching · CPC title

• H10P50/695 Primary

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

• G03F7/70466

  Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature (stitching G03F7/70475) · CPC title