Pattern shape evaluation method and pattern shape evaluation apparatus

Patent metadata

Field	Value
Publication number	US-8977034-B2
Application number	US-201013381629-A
Country	US
Kind code	B2
Filing date	Jun 29, 2010
Priority date	Jun 30, 2009
Publication date	Mar 10, 2015
Grant date	Mar 10, 2015

Abstract

An image of the joint portion of circuit patterns manufactured using a design pattern for double patterning is read out. Target boundary lines and evaluation regions are set on the image. In the evaluation regions, image processing is performed along the directions of the target boundary lines. Furthermore, binarization processing is performed. A decision is made based on an image obtained in this way as to whether the patterns have defects.

First claim

The invention claimed is:

1. A pattern shape evaluation method of evaluating a circuit pattern using a data storage device which stores data, an arithmetic unit which processes data, an input device permitting a user to perform input processing, and a display device which displays image data, said pattern shape evaluation method comprising:
reading out a design pattern used for double patterning and including at least two design patterns from said data storage device;
reading ou…

Assignees

• Toyoda Yasutaka
• Matsuoka Ryoichi
• Hitachi High Tech Corp

Inventors

• Toyoda Yasutaka
• Matsuoka Ryoichi

Classifications

• H10P74/203

  Electricity · mapped topic

• G01B15/04 Primary

  Physics · mapped topic

• H01L22/12

  Electricity · mapped topic