Resistance change memory and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-8975149-B2
Application number	US-201313971193-A
Country	US
Kind code	B2
Filing date	Aug 20, 2013
Priority date	Nov 30, 2009
Publication date	Mar 10, 2015
Grant date	Mar 10, 2015

Abstract

According to one embodiment, a resistance-change memory of embodiment includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting with the first direction, and a cell unit. The cell unit is provided at an intersection of the first interconnect line and the second interconnect line. The cell unit includes a non-ohmic element having a silicide layer on at least one of first and second ends thereof, and a memory element to store data in accordance with a reversible change in a resistance state. The silicide layer includes a 3d transition metal element which combines with an Si element to form silicide and which has a first atomic radius, and at least one kind of an additional element having a second atomic radius greater than the first atomic radius.

First claim

What is claimed is:

1. A resistance change memory manufacturing method comprising:
forming, above a substrate, a semiconductor layer including Si;
forming a metal film on the semiconductor layer, the metal film including a 3d transition metal element having a first atomic radius, and at least one kind of an additional element having a second atomic radius greater than the first atomic radius; and
forming a resistance change film at a formation condition from about 600° C. to a…

Assignees

• Toshiba Kk

Inventors

• Sonehara Takeshi

Classifications

• G11C2213/71

  Physics · mapped topic

• G11C2213/72

  Physics · mapped topic

• G11C13/0002 Primary

  Physics · mapped topic

• G11C13/0004

  Physics · mapped topic

• H01L45/1608 Primary

  Electricity · mapped topic