Substrate correction device, substrate lamination device, substrate processing system, substrate correction method, substrate processing method, and semiconductor device manufacturing method
US-2024404859-A1 · Dec 5, 2024 · US
Enhanced work function layer supporting growth of rutile phase titanium oxide
US8975147B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8975147-B2 |
| Application number | US-201213708035-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 7, 2012 |
| Priority date | Feb 19, 2010 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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Abstract
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This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO 2 ) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method of forming a semiconductor stack, comprising: forming a first conductive metal oxide layer above a substrate, the first conductive metal oxide having a lattice structure approximating rutile-phase titanium dioxide and having a first work function; forming a dielectric layer above the first conductive metal oxide layer, the dielectric layer comprising titanium dioxide (TiO2); and forming a barrier layer between the first conductive metal ox…
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Electricity · mapped topic
Electricity · mapped topic
- H10P95/00Primary
Electricity · mapped topic
Electricity · mapped topic
Chemistry & Metallurgy · mapped topic
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Frequently asked questions
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- What does patent US8975147B2 cover?
- This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystal…
- Who is the assignee on this patent?
- Intermolecular Inc, Elpida Memory Inc
- What technology area does this patent fall under?
- Primary CPC classification H10P95/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).