Printed wiring board

US8969732B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8969732-B2
Application numberUS-201213534041-A
CountryUS
Kind codeB2
Filing dateJun 27, 2012
Priority dateSep 28, 2011
Publication dateMar 3, 2015
Grant dateMar 3, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed wiring board includes a core insulation layer having via conductors through the core layer, a first structure including an interlayer insulation layer on first surface of the core layer and having via conductors through the interlayer layer in the first structure, and a second structure including an interlayer insulation layer on second surface of the core layer and having via conductors through the interlayer layer in the second structure. The interlayer layers have dielectric constants set to be 4.0 or lower for signal transmission at frequency of 1 GHz, the core layer has thermal expansion coefficient at or below Tg set lower than thermal expansion coefficients of the interlayer layers at or below Tg, the coefficient of the core layer at or below Tg is set to be 75 ppm/° C. or lower, and the conductors in the interlayer layers are stacked on the conductors in the core layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A printed wiring board, comprising: a core insulation layer having a plurality of via conductors comprising a plating material filling a plurality of holes formed through the core insulation layer; a first laminated structure comprising an interlayer insulation layer formed on a first surface of the core insulation layer and having a plurality of via conductors comprising a plating material filling a plurality of holes formed through the interlayer insulat…

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Frequently asked questions

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What does patent US8969732B2 cover?
A printed wiring board includes a core insulation layer having via conductors through the core layer, a first structure including an interlayer insulation layer on first surface of the core layer and having via conductors through the interlayer layer in the first structure, and a second structure including an interlayer insulation layer on second surface of the core layer and having via conduct…
Who is the assignee on this patent?
Amano Tetsuo, Nishiwaki Toshio, Ibiden Co Ltd
What technology area does this patent fall under?
Primary CPC classification H05K3/4602. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).