Method of making structure having a gate stack

Patent metadata

Field	Value
Publication number	US-8940596-B2
Application number	US-201314058523-A
Country	US
Kind code	B2
Filing date	Oct 21, 2013
Priority date	May 5, 2011
Publication date	Jan 27, 2015
Grant date	Jan 27, 2015

Abstract

A method includes removing a first portion of a gate layer of a structure. The structure includes a drain region, a source region, and a gate stack, and the gate stack includes a gate dielectric layer, a gate conductive layer directly on the gate dielectric layer, and the gate layer directly on the gate conductive layer. A drain contact region is formed on the drain region, and a source contact region is formed on the source region. A conductive region is formed directly on the gate conductive layer and adjacent to a second portion of the gate layer. A gate contact terminal is formed in contact with the conductive region.

First claim

What is claimed is:

1. A method comprising:
removing a first portion of a gate layer of a structure, the structure comprising a drain region, a source region, and a gate stack, the gate stack comprising a gate dielectric layer, a gate conductive layer directly on the gate dielectric layer, and the gate layer directly on the gate conductive layer;
forming a drain contact region on the drain region and forming a source contact region on the source region;
forming a conductive re…

Assignees

• Taiwan Semiconductor Mfg

Inventors

• Chuang Harry-Hak-Lay
• Song Ming-Hsiang
• Chen Kuo-Ji
• Zhu Ming
• Chen Po-Nien
• Young Bao-Ru

Classifications

• H10D64/258

  Electricity · mapped topic

• H10D64/111

  Electricity · mapped topic

• H10D64/62

  Electricity · mapped topic

• H10D62/116

  Electricity · mapped topic

• H10D62/83

  Electricity · mapped topic