Electrical Testing for Panel Characterization and Defect Screening
US-2024402237-A1 · Dec 5, 2024 · US
US8940558B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8940558-B2 |
| Application number | US-201313836478-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 15, 2013 |
| Priority date | Mar 15, 2013 |
| Publication date | Jan 27, 2015 |
| Grant date | Jan 27, 2015 |
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Techniques for quantifying ΔDfin in FINFET technology are provided. In one aspect, a method for quantifying ΔDfin between a pair of long channel FINFET devices includes the steps of: (a) obtaining Vth values for each of the long channel FINFET devices in the pair; (b) determining a ΔVth for the pair of long channel FINFET devices; and (c) using the ΔVth to determine the ΔDfin between the pair of long channel FINFET devices, wherein the ΔVth is a function of a difference in a Qbody and a gate capacitance between the pair of long channel FINFET devices, and wherein the Qbody is a function of Dfin and Nch for each of the long channel FINFET devices in the pair, and as such the ΔVth is proportional to the ΔDfin between the pair of long channel FINFET devices.
Opening claim text (preview).
What is claimed is: 1. A method for analyzing fin thickness variation (ΔDfin) between a pair of long channel FIN field-effect transistor (FINFET) devices, the method comprising the steps of: (a) obtaining threshold voltage (Vth) values for each of the long channel FINFET devices in the pair; (b) determining a difference in the Vth values (ΔVth) for the pair of long channel FINFET devices; (c) using the ΔVth to determine the ΔDfin between the pair of long channel FINFET devices…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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