Apparatus and memory device including spiral tsv connection
US-2024413124-A1 · Dec 12, 2024 · US
US2026033310A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2026033310-A1 |
| Application number | US-202519251332-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 26, 2025 |
| Priority date | Jul 26, 2024 |
| Publication date | Jan 29, 2026 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A microelectronic device includes a stack with vertically repeated tiers respectively including insulative and conductive structure(s). Slits divide the stack into blocks. Within a block, a series of stadiums is formed with stadiums horizontally spaced by crests. The stadiums are individually defined in unique groups of the tiers and include staircase(s). A first stadium of the series is defined in a first tier group elevationally above a second tier group in which a second stadium is defined. Step contacts extend to or into steps of the staircase(s). Through-stack vias extend a height of the stack and are in electrical communication with the step contacts. Some through-stack vias are within the first stadium area and are in electrical communication with the first stadium's step contacts. Other through-stack vias are within the crests and are in electrical communication with the second stadium's step contacts. Related methods and systems are also disclosed.
Opening claim text (preview).
What is claimed is: 1 . A microelectronic device, comprising: a stack structure comprising a vertically repeated sequence of tiers respectively comprising at least one insulative structure and at least one conductive structure; slit structures extending through the stack structure to divide the stack structure into blocks; a series of stadiums within the stack structure of one of the blocks and horizontally spaced from one another by crests of the stack structure, the stadiums of the series individually defined in unique groups of the tiers of the stack structure, the stadiums of the series individually comprising one or more staircases comprising steps, the series of stadiums comprising: a first stadium defined in a first tier group of the unique groups of the tiers; and a second stadium defined in a second tier group of the unique groups of the tiers, the first tier group being elevationally higher in the stack structure than the second tier group; conductive step contacts extending to or into the steps; and conductive through-stack vias extending a height of the stack structure and in electrical communication with the conductive step contacts, the conductive through-stack vias comprising: some conductive through-stack vias within a horizontal area of the first stadium and in electrical communication with the conductive step contacts in the first stadium; and other conductive through-stack vias within a horizontal area of the crests and in electrical communication with the conductive step contacts in the second stadium. 2 . The microelectronic device of claim 1 , further comprising at least one bridge area of the stack structure extending a width of the one of the blocks to provide a substantially continuous conductive region for each of the at least one conductive structure of the stack structure of the one of the blocks. 3 . The microelectronic device of claim 2 , wherein one of the bridges defines a rear of the one of the blocks and another of the bridges defines a front of the one of the blocks. 4 . The microelectronic device of claim 1 , wherein the first stadium comprises multiple sets of the one or more staircases. 5 . The microelectronic device of claim 1 , wherein the second stadium comprises a single set of the one or more staircases. 6 . The microelectronic device of claim 1 , wherein the one or more staircases of individual of the stadiums of the series are arranged in at least one set, each set of the at least one set comprising a descending staircase and an ascending staircase. 7 . The microelectronic device of claim 6 , wherein the descending staircase is vertically offset from the ascending staircase. 8 . The microelectronic device of claim 6 , wherein, within the first stadium, a riser height between neighboring steps of the steps of the descending staircase and between neighboring steps of the steps of the ascending staircase is a height of multiple of the tiers. 9 . The microelectronic device of claim 8 , wherein, within the second stadium, a riser height between neighboring steps of the steps of the descending staircase and between neighboring steps of the steps of the ascending staircase is a height of a single one of the tiers. 10 . A microelectronic device, comprising: a stack structure comprising a vertically repeated pattern of tiers, the tiers individually comprising insulative material and conductive material; slit structures extending through the stack structure to define blocks of the stack structure; the blocks individually comprising a series of staircased stadiums comprising: at least one multi-set stadium comprising multiple sets of at least one staircase; and at least one single-set stadium comprising a single set of at least one staircase; conductive step contacts extending to or into steps of the multiple sets of at least one staircase; additional conductive step contacts extending to or into steps of the single set of at least one staircase; conductive through-stack vias within a horizontal area of the at least one multi-set stadium, extending a height of the stack structure, and in electrical communication with the conductive step contacts; and additional conductive through-stack vias outside a horizontal area of the at least one single-set stadium, extending the height of the stack structure, and in electrical communication with the additional conductive step contacts. 11 . The microelectronic device of claim 10 , wherein the at least one multi-set stadium is defined in a group of the tiers that is elevationally higher in the stack structure than another group of the tiers in which the at least one single-set stadium is defined. 12 . The microelectronic device of claim 10 , wherein: the conductive through-stack vias extend in part through the stack structure; and the additional conductive through-stack vias extend substantially in their entirety through the stack structure. 13 . The microelectronic device of claim 10 , further comprising other conductive through-stack vias inside a horizontal area of a lowest of the steps of the at least one single-set stadium, extending the height of the stack structure, and in electrical communication with other conductive step contacts extending to or into other steps of the single set of at least one staircase. 14 . The microelectronic device of claim 10 , wherein the conductive through-stack vias and the additional conductive through-stack vias extend to conductive landing regions in a base region below the stack structure. 15 . The microelectronic device of claim 14 , wherein the base region further comprises multiple elevations of conductive routing to provide electrical communication between the conductive landing regions and string drivers. 16 . The microelectronic device of claim 10 , further comprising support contact structures extending the height of the stack structure, the support contact structures electrically isolated from all of the conductive step contacts. 17 . The microelectronic device of claim 10 , wherein: the conductive step contacts extending to or into the steps of the multiple sets of the at least one staircase are each in electrical communication with one of the conductive through-stack vias that is within the horizontal area of the at least one multi-set stadium; and the additional conductive step contacts extending to or into the steps of the single set of the at least one staircase are each in electrical communication with one of the additional conductive through-stack vias that are outside the horizontal area of the at least one single-set stadium. 18 . A method of forming a microelectronic device, comprising: forming a stack structure comprising a vertically repeated sequence of tiers respectively comprising insulative material and sacrificial material; forming stadium openings in the stack structure, the stadium openings defining a series of stadiums within the stack structure, the stadiums spaced from one another by crest areas defined by non-patterned areas of the stack structure, the stadiums of the series individually defined in unique groups of the tiers of the stack structure, the stadiums of the series individually comprising one or more staircases comprising steps, forming the stadium openings comprising: forming a first stadium opening defining a first stadium in a first tier group of the unique groups of the tiers; and forming a second stadium opening defining a second stadium in a second tier group of the unique groups of the tiers, the first tier group being elevationally hi
characterised by the top-view layout · CPC title
characterised by the top-view layout · CPC title
the channels comprising vertical portions, e.g. U-shaped channels · CPC title
the channels comprising vertical portions, e.g. U-shaped channels · CPC title
Electricity · mapped topic
Related publications grouped by family.
Answers are generated from the same data shown on this page.