Method of detecting defective semiconductor package

US2025173857A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025173857-A1
Application numberUS-202418926508-A
CountryUS
Kind codeA1
Filing dateOct 25, 2024
Priority dateNov 23, 2023
Publication dateMay 29, 2025
Grant date

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  5. First independent claim

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Abstract

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A method of detecting a defective semiconductor package includes obtaining a target image of a backside surface of a package substrate that includes a pair of window patterns and connection terminal arrays extending in a first direction. A shift value of the pair of window patterns illustrated in the target image is measured, and the shift value is compared with a reference value to determine whether the package substrate is defective or is not defective. The measuring of the shift value of the pair of window patterns includes obtaining a first center position value between a pair of adjacent connection terminal arrays that are farthest away from each other among pairs of adjacent connection terminal arrays. A second center position value is obtained between the pair of window patterns. A difference between the first center position value and the second center position value is defined as the shift value.

First claim

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What is claimed is: 1 . A method of detecting a defective semiconductor package, the method comprising: obtaining a target image of a backside surface of a package substrate that includes a pair of window patterns and a plurality of connection terminal arrays extending in a first direction; measuring a shift value of the pair of window patterns illustrated in the target image; and comparing the shift value with a reference value to determine whether the package substrate is defective or is not defective, wherein the measuring of the shift value of the pair of window patterns comprises: obtaining a first center position value between a pair of adjacent connection terminal arrays that are farthest away from each other among pairs of adjacent connection terminal arrays of the plurality of connection terminal arrays; obtaining a second center position value between the pair of window patterns; and defining a difference between the first center position value and the second center position value as the shift value. 2 . The method of claim 1 , wherein, in the obtaining of the first center position value, the first center position value is an average of position values of the pair of adjacent connection terminal arrays in a second direction perpendicular to the first direction. 3 . The method of claim 2 , wherein each of the pair of adjacent connection terminal arrays comprises a solder ball having a circular shape in a horizontal plane. 4 . The method of claim 1 , wherein the determining of whether the package substrate is defective or is not defective comprises: when the shift value is greater than the reference value, determining that the package substrate is defective; and when the shift value is less than or equal to the reference value, determining that the package substrate is not defective. 5 . The method of claim 1 , wherein the obtaining of the second center position value comprises obtaining positions of the pair of window patterns based on a U-Net model. 6 . The method of claim 1 , wherein a length of the pair of window patterns in the first direction is greater than a length of the pair of adjacent connection terminal arrays in the first direction. 7 . The method of claim 1 , wherein the pair of window patterns comprises a pattern of a molding layer exposed at the backside surface of the package substrate. 8 . The method of claim 1 , wherein, in the obtaining of the second center position value, the pair of window patterns is disposed between the pair of adjacent connection terminal arrays in a second direction perpendicular to the first direction. 9 . The method of claim 1 , further comprising, after the determining of whether the package substrate is defective or is not defective, detecting a defect of a package mark formed on a front-side surface of the package substrate. 10 . The method of claim 1 , wherein the reference value is in a range of about 200 μm to about 500 μm. 11 . A method of detecting a defective semiconductor package, the method comprising: obtaining a target image of a backside surface of a package substrate that includes a pair of window patterns and a plurality of connection terminal arrays extending in a first direction; measuring a position value of each of the plurality of connection terminal arrays in a second direction perpendicular to the first direction in the target image; defining a first center connection terminal array and a second center connection terminal array that comprise a pair of adjacent connection terminal arrays that are farthest away from each other among pairs of adjacent connection terminal arrays of the plurality of connection terminal arrays; obtaining a first center position value between a position value of the first center connection terminal array in the second direction and a position value of the second center connection terminal array in the second direction; measuring position values of each of the pair of window patterns in the second direction; obtaining a second center position value between the position values of the pair of window patterns in the second direction; defining a difference between the first center position value and the second center position value as a shift value; and comparing the shift value with a reference value to determine whether the package substrate is defective or is not defective. 12 . The method of claim 11 , wherein, in the obtaining of the target image, the target image is an image obtained by extracting an image captured by a camera of the backside surface of the package substrate. 13 . The method of claim 11 , wherein the determining of whether the package substrate is defective or is not defective comprises: when the shift value is greater than the reference value, determining that the package substrate is defective; and when the shift value is less than or equal to the reference value, determining that the package substrate is not defective. 14 . The method of claim 11 , wherein, in the measuring of the position value of each of the plurality of connection terminal arrays in the second direction in the target image, the position value of each of the plurality of connection terminal arrays is a position value of a center point of a connection terminal having a circular shape and configuring each of the plurality of connection terminal arrays, with respect to a horizontal plane. 15 . The method of claim 11 , wherein the obtaining of the position value of each of the pair of window patterns in the second direction comprises obtaining the position value of each of the pair of window patterns in the second direction based on a U-Net model. 16 . The method of claim 11 , wherein the pair of window patterns comprises a pattern of a molding layer exposed at the backside surface of the package substrate. 17 . The method of claim 11 , further comprising, after the comparing of the shift value with a reference value to determine whether the package substrate is defective or is not defective, turning over the package substrate and inspecting a mark formed on a front-side surface of the package substrate that is opposite to the backside surface of the package substrate. 18 . The method of claim 17 , wherein the package substrate is a printed circuit board (PCB). 19 . A method of detecting a defective semiconductor package, the method comprising: obtaining an image of a backside surface of a printed circuit board (PCB) that includes a pair of window patterns and a plurality of solder ball arrays extending in an X-axis direction; extracting a target image from the image; measuring a position value of each of the plurality of solder ball arrays in a Y-axis direction in the target image; defining a first solder ball array and a second solder ball array that comprise a pair of adjacent solder ball arrays that are farthest away from each other in the Y-axis direction among pairs of adjacent solder ball arrays of the plurality of solder ball arrays; obtaining a first center position value that is an average of a position value of the first solder ball array in the Y-axis direction and a position value of the second solder ball array in the Y-axis direction; measuring a position value of each of the pair of window patterns in the Y-axis direction; obtaining a second center position value that is an average of the position values of the pair of window patterns in the Y-axis direction; defining a difference between the first center position value and the second center position value as a shift va

Assignees

Inventors

Classifications

  • H10P74/203Primary

    Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Recognition of objects for industrial automation · CPC title

  • Semiconductor; IC; Wafer · CPC title

  • Determining position or orientation of objects or cameras (camera calibration G06T7/80) · CPC title

  • G06T7/001Primary

    using an image reference approach · CPC title

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What does patent US2025173857A1 cover?
A method of detecting a defective semiconductor package includes obtaining a target image of a backside surface of a package substrate that includes a pair of window patterns and connection terminal arrays extending in a first direction. A shift value of the pair of window patterns illustrated in the target image is measured, and the shift value is compared with a reference value to determine w…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P74/203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu May 29 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).