Display panel and method for fabricating the same

Patent metadata

Field	Value
Publication number	US-2024298475-A1
Application number	US-202318352525-A
Country	US
Kind code	A1
Filing date	Jul 14, 2023
Priority date	Mar 3, 2023
Publication date	Sep 5, 2024
Grant date	—

Abstract

A display panel, including, from bottom to top: a substrate, a drive layer, an anode layer, a luminescent layer, a cathode layer, and an encapsulation layer. The anode layer includes anode units arranged at intervals. A pixel defining layer is arranged around the anode units. The pixel defining layer includes a pixel defining units, each defining units is arranged between adjacent anode units. Conductive units are arranged on the pixel defining unit, respectively, and eave layers are arranged on the conductive units, respectively. The luminescent layer is covered on the anode units and the pixel defining units. The cathode layer is covered on the luminescent layer. The encapsulation layer is covered on the cathode layer, the plurality of conductive units, and the eave layers. A lateral side of each of the plurality of pixel defining units is a downwardly concave slope.

First claim

What is claimed is:

1 . A display panel, comprising, from bottom to top:
a substrate, a drive layer, an anode layer, a luminescent layer, a cathode layer, and an encapsulation layer; wherein
the anode layer comprises a plurality of anode units arranged at intervals; a pixel defining layer is arranged around the plurality of anode units; the pixel defining layer comprises a plurality of pixel defining units, each of the plurality of pixel defining units is arranged between adjacent anode units; a plurality of conductive units are arranged on the plurality of pixel defining unit, respectively, and a plurality of eave layers are arranged on the plurality of conductive units, respectively;
the luminescent layer is covered on the plurality of anode units and the plurality of pixel defining units; the cathode layer is covered on the luminescent layer; the encapsulation layer is covered on the cathode layer, the plurality of conductive units, and the plurality of eave layers; and
a lateral side of each of the plurality of pixel defining units is a downwardly concave slope.

2 . The display panel according to claim 1 , wherein a projection area of a lower end surface of each of the plurality of conductive units onto the substrate is within a projection area of an upper end surface of a corresponding pixel defining unit onto the substrate; and
a maximum distance between an edge of the upper end surface of each of the plurality of pixel defining units and an edge of the lower end surface of a corresponding conductive unit is smaller than or equal to 1μ m.

3 . The display panel according to claim 1 , wherein the lateral side of each of the plurality of pixel defining units is a downwardly concave curved surface.

4 . The display panel according to claim 1 , wherein the lateral side of each of the plurality of pixel defining units is in a stepped structure.

5 . The display panel according to claim 1 , wherein a chamfer is provided between an edge of an upper end surface of each of the plurality of pixel defining units and the lateral side of each of the plurality of pixel defining units.

6 . The display panel according to claim 1 , wherein a distance between an edge of a lower end surface of each of the plurality of conductive units and an edge of a lower end surface of a corresponding eave layer is greater than or equal to 2μ m and smaller than or equal to 3μ m.

7 . The display panel according to claim 1 , wherein an included angle between an upper end surface of the anode layer and a connection line between two end points of a longitudinal section of the lateral side of each of the plurality of pixel defining units is greater than or equal to 15 degrees, and smaller than or equal to 45 degrees.

8 . The display panel according to claim 1 , wherein each of the plurality of pixel defining units partially covers corresponding anode units.

9 . The display panel according to claim 8 , wherein a width of each of the plurality of pixel defining units covering a corresponding anode unit is greater than or equal to 0.5μ m and smaller than or equal to 1μ m; and
a thickness of each of the plurality of pixel defining units covering a corresponding anode unit is greater than or equal to 0.3μ m and smaller than or equal to 2μ m.

10 . A method for fabricating the display panel according to claim 1 , the method comprising:
forming the drive layer on the substrate; forming the anode layer on the drive layer, wherein the anode layer comprises the plurality of anode units arranged at intervals; forming each of the plurality of pixel defining units between adjacent anode units; forming the luminescent layer above the anode layer and the plurality of pixel defining units, and forming the cathode layer on the luminescent layer; forming the plurality of conductive units on the plurality of pixel defining units, respectively, and forming the plurality of eave layers on the plurality of conductive units, respectively; and forming the encapsulation layer above the cathode layer, the plurality of conductive units, and the plurality of eave layers.

11 . The method according to claim 10 , wherein a projection area of a lower end surface of each of the plurality of conductive units onto the substrate is within a projection area of an upper end surface of a corresponding pixel defining unit onto the substrate; and
a maximum distance between an edge of the upper end surface of each of the plurality of pixel defining units and an edge of the lower end surface of a corresponding conductive unit is smaller than or equal to 1μ m.

12 . The method according to claim 10 , wherein the lateral side of each of the plurality of pixel defining units is a downwardly concave curved surface.

13 . The method according to claim 10 , wherein the lateral side of each of the plurality of pixel defining units is in a stepped structure.

14 . The method according to claim 10 , wherein a chamfer is provided between an edge of an upper end surface of each of the plurality of pixel defining units and the lateral side of each of the plurality of pixel defining units.

15 . The method according to claim 10 , wherein a distance between an edge of a lower end surface of each of the plurality of conductive units and an edge of a lower end surface of a corresponding eave layer is greater than or equal to 2μ m and smaller than or equal to 3μ m.

16 . The method according to claim 10 , wherein an included angle between an upper end surface of the anode layer and a connection line between two end points of a longitudinal section of the lateral side of each of the plurality of pixel defining units is greater than or equal to 15 degrees, and smaller than or equal to 45 degrees.

17 . The method according to claim 10 , wherein each of the plurality of pixel defining units partially covers corresponding anode units.

18 . The method according to claim 15 , wherein each of the plurality of pixel defining units partially covers corresponding anode units.

19 . The method according to claim 16 , wherein each of the plurality of pixel defining units partially covers corresponding anode units.

20 . The method according to claim 17 , wherein a width of the each of the plurality of pixel defining units covering a corresponding anode unit is greater than or equal to 0.5μ m and smaller than or equal to 1μ m; and
a thickness of each of the plurality of pixel defining units covering a corresponding anode unit is greater than or equal to 0.3μ m and smaller than or equal to 2μ m.

Assignees

• Hkc Corp Ltd

Inventors

• Jiang Lei
• Zhou Yangchuan
• Li Rongrong

Classifications

• H10K2102/351

  Thickness · CPC title

• H10K71/00 Primary

  Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

• H10K59/1201

  Manufacture or treatment · CPC title

• H10K59/8051

  Anodes · CPC title

• H10K59/873

  Encapsulations · CPC title