Micro inert anode array for die level electrodeposition thickness distribution control

US2024279839A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024279839-A1
Application numberUS-202218568787-A
CountryUS
Kind codeA1
Filing dateJun 17, 2022
Priority dateJun 21, 2021
Publication dateAug 22, 2024
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Metal may be electroplated on a semiconductor substrate in an electroplating chamber with a micro inert anode array positioned proximate to the semiconductor substrate having one or more die. The micro inert anode array includes a plurality of micro inert anode elements that are independently controllable. Current applied to the micro inert anode elements provides a current distribution in the array that may be based at least in part on a die layout in the semiconductor substrate or based at least in part on global within-wafer corrections. The current distribution may achieve uniform plating thickness even with a non-uniform distribution of features in the die of the semiconductor substrate. In some implementations, current distribution may be adjusted in the array during substrate rotation according to a rotational path of the semiconductor substrate.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method of electroplating metal features on a substrate, the method comprising: receiving a substrate in an electroplating chamber, wherein the substrate includes one or more dice having a distribution of patterned features; contacting the substrate with an electrolyte in the electroplating chamber; and electroplating metal on the substrate using a micro inert anode array having a plurality of micro inert anode elements, wherein current is applied to two or more micro inert anode elements to provide a non-uniform current distribution over an area of the substrate. 2 . The method of claim 1 , wherein the current is applied to two or more micro inert anode elements to provide the non-uniform current distribution that is based at least in part on patterned feature layouts of the one or more dice. 3 . The method of claim 1 , wherein the current is applied to two or more micro inert anode elements to provide the non-uniform current distribution that is based at least in part on global within-wafer (WW) corrections. 4 . The method of claim 1 , wherein the one or more dice comprise layouts of patterned features, wherein the area over which the non-uniform current distribution is applied includes a distance between repeating layouts of patterned features, and wherein the distance is larger than a pitch defined between micro inert anode elements and larger than a gap size defined between the substrate and the micro inert anode array. 5 . The method of claim 1 , wherein a gap size defined between the substrate and the micro inert anode array is equal to or greater than a pitch defined between micro inert anode elements in the micro inert anode array. 6 . The method of claim 5 , wherein the gap size is at least three times greater than the pitch defined between micro inert anode elements and at least three times greater than a critical dimension of each micro inert anode element. 7 . The method of claim 1 , wherein a gap size defined between the substrate and the micro inert anode array is equal to or less than about 4 mm. 8 . The method of claim 1 , wherein a pitch defined between micro inert anode elements in the micro inert anode array is equal to or less than about 500 urn. 9 . The method of claim 1 , wherein contacting the substrate with the electrolyte includes cross-flowing the electrolyte laterally across the surface of the substrate. 10 . The method of claim 1 , further comprising: identifying patterned feature layouts in the one or more dice in the substrate prior to electroplating metal on the substrate using the micro inert anode array. 11 . The method of claim 1 , further comprising: determining a current distribution on an anode ground plane from a uniform die current distribution through a simulation or calculation to obtain a simulated or calculated current distribution; and assigning current values to each of the micro inert anode elements in the micro inert anode array based on the simulated or calculated current distribution on the anode ground plane. 12 . The method of claim 1 , further comprising: rotating the substrate while electroplating metal on the substrate using the micro inert anode array; and changing current applied to the two or more micro inert anode elements to achieve a new current distribution based at least in part on positioning of patterned feature layouts of the one or more dice after rotation. 13 . The method of claim 1 , wherein each of the micro inert anode elements are physically isolated from one another, electrically isolated from one another, and independently controllable to receive current from a power source. 14 . The method of claim 1 , wherein the metal is electroplated with a substantially uniform thickness in the one or more dice having a distribution of patterned features. 15 . The method of claim 1 , wherein the substrate has patterned photoresist over a conductive seed layer, wherein the metal is electroplated in recessed features defined by the patterned photoresist and on exposed portions of the conductive seed layer. 16 . An electroplating apparatus comprising: a substrate holder configured to hold a partially fabricated semiconductor substrate, wherein the partially fabricated semiconductor substrate comprises one or more dice having a distribution of patterned features; a micro inert anode array proximate the partially fabricated semiconductor substrate, wherein the micro inert anode array includes a plurality of independently controllable micro inert anode elements arranged in an array; and a cross-flow manifold configured to contain an electrolyte flowing between the micro inert anode array and the partially fabricated semiconductor substrate, wherein the cross-flow manifold promotes cross flowing of the electrolyte across the surface of the partially fabricated semiconductor substrate. 17 . The electroplating apparatus of claim 16 , wherein the one or more dice have a non-uniform distribution of patterned features. 18 . The electroplating apparatus of claim 16 , wherein a gap size defined between the partially fabricated semiconductor substrate and the micro inert anode array is equal to or greater than a pitch defined between micro inert anode elements in the micro inert anode array. 19 . The electroplating apparatus of claim 18 , wherein the gap size is equal to or less than about 4 mm and wherein the pitch is equal to or less than about 500 μm. 20 . The electroplating apparatus of claim 16 , wherein the micro inert anode array comprises at least 100 micro inert anode elements. 21 . The electroplating apparatus of claim 16 , further comprising: a controller configured with instructions to perform the following operations: apply current to two or more micro inert anode elements in the array to provide a desired current distribution based at least in part on a layout of patterned features in the partially fabricated semiconductor substrate. 22 . The electroplating apparatus of claim 21 , wherein the controller is further configured with instructions to perform the following operations: rotate the partially fabricated semiconductor substrate while electrolyte is flowing across the surface of the partially fabricated semiconductor substrate; and change current to the two or more micro inert anode elements in the array to provide a new current distribution based at least in part on positioning of the layout of patterned features in the partially fabricated semiconductor substrate after rotation. 23 . An electroplating apparatus comprising: a substrate load/unload station configured to receive a semiconductor substrate; a substrate pretreatment station configured to pretreat the semiconductor substrate; one or more electroplating stations configured to plate metal on the semiconductor substrate, each electroplating station comprising: a substrate holder configured to hold the semiconductor substrate: a micro inert anode array comprising a plurality of independently controllable micro inert anode elements, wherein the micro inert anode array is spaced apart from the semiconductor substrate by a gap that is greater than a pitch between the micro inert anode elements; and a plating bath reservoir configured to deliver electrolyte to the gap between the micro inert anode array and the semiconductor substrate; and one or more robots configured to transfer the semiconductor substrate between the substrate load/unload st

Assignees

Inventors

Classifications

  • of electrolytes (C25D21/22 takes precedence) · CPC title

  • Controlled addition of electrolyte components · CPC title

  • Current directing devices · CPC title

  • Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells · CPC title

  • C25D7/123Primary

    Semiconductors first coated with a seed layer or a conductive layer · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2024279839A1 cover?
Metal may be electroplated on a semiconductor substrate in an electroplating chamber with a micro inert anode array positioned proximate to the semiconductor substrate having one or more die. The micro inert anode array includes a plurality of micro inert anode elements that are independently controllable. Current applied to the micro inert anode elements provides a current distribution in the …
Who is the assignee on this patent?
Lam Res Corp
What technology area does this patent fall under?
Primary CPC classification C25D7/123. Mapped technology areas include Chemistry & Metallurgy.
When was this patent published?
Publication date Thu Aug 22 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).