Package carrier board integrated with inductive circuit structure and manufacturing method thereof

US2024222140A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024222140-A1
Application numberUS-202318393823-A
CountryUS
Kind codeA1
Filing dateDec 22, 2023
Priority dateDec 30, 2022
Publication dateJul 4, 2024
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A package carrier board includes a first circuit build-up structure, a patterned magnetic conductive metal layer, a plurality of first conductive pillar, a second insulating layer, and a second circuit build-up structure. The patterned magnetic conductive metal layer is disposed above the first circuit build-up structure, and the cross-sectional pattern of the patterned magnetic conductive metal layer is L-shaped and/or U-shaped. The first conductive pillars are disposed on the first circuit build-up structure and located outside of the patterned magnetic conductive metal layer. The second insulating layer covers the patterned magnetic conductive metal layer and the first conductive pillars. The second circuit build-up structure is disposed on the second insulating layer. The first circuit build-up structure, the first conductive pillars, the second insulating layer, and the second circuit build-up structure are combined to form an inductive circuit structure. Additionally, a manufacturing method for the package carrier board is also disclosed.

First claim

Opening claim text (preview).

What is claimed is: 1 . A manufacturing method for a package carrier board integrated with an inductive circuit structure, comprising: step (A) is to provide a first circuit build-up structure with a first insulating layer, a first patterned conductive circuit layer, and a first conductive pillar layer; step (B) is to form a conductive layer, which has a plurality of first conductive pillars and a plurality of temporary first conductive walls, on the surface of the first insulating layer wherein the first conductive pillars are electrically connected to the first conductive pillar layer; step (C) is to form a first photoresist layer to cover the first conductive pillars and a part of surface of the first insulating layer; step (D) is to apply a magnetic metal material to cover the surface of the temporary first conductive wall and a part of surface of the first insulating layer; step (E) is to form a second photoresist layer to cover the magnetic metal material and the first photoresist layer; step (F) is to remove a portion of the first photoresist layer, the second photoresist layer, the magnetic metal material, the first conductive pillars, and the temporary first conductive wall to expose a top surface of the first conductive pillars and a top surface of the temporary first conductive wall; step (G) is to form a third photoresist layer to cover the top surface of the first conductive pillars; step (H) is to remove the temporary first conductive wall to leave the unremoved magnetic metal material to form a patterned magnetic conductive metal layer; step (I) is to remove the third photoresist layer, the second photoresist layer, and the first photoresist layer to expose the first conductive pillars and the patterned magnetic conductive metal layer; step (J) is to form a second insulating layer on the first insulating layer to encapsulate the patterned magnetic conductive metal layer and the first conductive pillars, and to remove a part of the second insulating layer to expose the top surface of the first conductive pillars; and step (K) is to form a second circuit build-up structure on the second insulating layer to electrically connect to the first conductive pillars, wherein the second circuit build-up structure has a third insulating layer, a second patterned conductive circuit layer, and a second conductive pillar layer; wherein the first circuit build-up structure, the first conductive pillars, and the second circuit build-up structure is combined to form the inductive circuit structure; wherein the patterned magnetic conductive metal layer is not electrically connected to the inductive circuit structure. 2 . The manufacturing method for the package carrier board integrated with the inductive circuit structure of claim 1 , wherein step (D) is to form the magnetic metal material by electroplating or deposition and cover the surface of the temporary first conductive wall and a part of surface of the first insulating layer. 3 . The manufacturing method for the package carrier board integrated with the inductive circuit structure of claim 1 , wherein step (H) is to remove the temporary first conductive wall by etching. 4 . The manufacturing method for the package carrier board integrated with the inductive circuit structure of claim 1 , wherein the inductive circuit structure is a spiral coil-shaped inductive circuit, a solenoid coil-shaped inductive circuit, or a toroidal coil-shaped inductive circuit, wherein an extension length of the temporary first conductive wall is approximately equal to an extension length of the coil of the inductive circuit so as to ensure that the extension length of the patterned magnetic conductive metal layer is also approximately equal to the extension length of the coil of the inductive circuit structure. 5 . The manufacturing method for the package carrier board integrated with the inductive circuit structure of claim 1 , wherein before step (K) is performed, steps (B) through (J) may be repeated once or more times to form a plurality of stacked patterned magnetic conductive metal layers. 6 . The manufacturing method for the package carrier board integrated with the inductive circuit structure of claim 5 , wherein before repeating steps (B) through (J), the method further comprises forming a spacer insulating layer on the second insulating layer. 7 . A package carrier board integrated with an inductive circuit structure, comprising: a first circuit build-up structure, which has a stacked arrangement of a first patterned conductive circuit layer and a first conductive pillar layer, with the first patterned conductive circuit layer and the first conductive pillar layer encapsulated in a first insulating layer; a patterned magnetic conductive metal layer, which is disposed above the first circuit build-up structure, and the cross-sectional pattern of the patterned magnetic conductive metal layer is in the shape of an L and/or U; a plurality of first conductive pillars, which are disposed on the first circuit build-up structure and located on an outer side of the patterned magnetic conductive metal layer; a second insulating layer, which covers the patterned magnetic conductive metal layer and the first conductive pillars; and a second circuit build-up structure, which is disposed on the second insulating layer, having a stacked arrangement of a second patterned conductive circuit layer and a second conductive pillar layer, with the second patterned conductive circuit layer and the second conductive pillar layer encapsulated in a third insulating layer, wherein the second circuit build-up structure is electrically connected to the first conductive pillars; wherein the first circuit build-up structure, the first conductive pillar, and the second circuit build-up structure are combined to form a spiral coil-shaped inductive circuit, a solenoid coil-shaped inductive circuit, or a toroidal coil-shaped inductive circuit, wherein the patterned magnetic conductive metal layer is positioned within the inductive circuit structure and is not electrically connected to each other and an extension length of the patterned magnetic conductive metal layer is approximately equal to an extension length of the inductive circuit structure. 8 . The package carrier board integrated with the inductive circuit structure of claim 7 , wherein the patterned magnetic conductive metal layer is arranged in a stacked configuration with a plurality of layers. 9 . The package carrier board integrated with the inductive circuit structure of claim 8 , wherein a spacer insulating layer is disposed between each of the stacked layers of the patterned magnetic conductive metal layer; wherein the material of the spacer insulating layer includes organic photosensitive dielectric materials, organic non-photosensitive dielectric materials, and/or inorganic oxide materials; wherein the organic dielectric material composition includes organic resin, and the organic resin includes epoxy resin of substrate or prepreg such as BT, FR4, or FR5, organic substrate ABF, epoxy molding compound, film-like EMC, or polyimide; and wherein the composition of the inorganic oxide material includes micrometer-scale or nanometer-scale silicon oxide, nickel oxide, or copper oxide. 10 . The package carrier board integrated with the inductive circuit structure of claim 7 , wherein the material of the patterned magnetic conductive metal layer includes iron, nickel, cobalt, zinc, or an alloy containing at least two of these elements or two or more, with alloy doping of materials such as manganese, molybdenum, boron, copper, or vanadium. 11 . The package carrier board integrated with the inductive

Assignees

Inventors

Classifications

  • Dispositions of multiple connectors or interconnections · CPC title

  • H10W72/30Primary

    Die-attach connectors · CPC title

  • of conductive or resistive materials · CPC title

  • the encapsulations exposing the passive side of the semiconductor body · CPC title

  • Bump connectors and die-attach connectors (bumps embedded in underfills H10W74/15) · CPC title

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What does patent US2024222140A1 cover?
A package carrier board includes a first circuit build-up structure, a patterned magnetic conductive metal layer, a plurality of first conductive pillar, a second insulating layer, and a second circuit build-up structure. The patterned magnetic conductive metal layer is disposed above the first circuit build-up structure, and the cross-sectional pattern of the patterned magnetic conductive meta…
Who is the assignee on this patent?
Phoenix Pioneer Technology Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W72/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 04 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).