Interlayer for Resistivity Reduction in Metal Deposition Applications

Patent metadata

Field	Value
Publication number	US-2024194527-A1
Application number	US-202318197846-A
Country	US
Kind code	A1
Filing date	May 16, 2023
Priority date	Dec 7, 2022
Publication date	Jun 13, 2024
Grant date	—

Abstract

Methods and apparatus for processing a substrate are provided. In some embodiments, a method includes depositing an amorphous interlayer atop a first layer on a substrate, wherein the first layer is a metal-containing layer, and depositing a metal layer atop the amorphous interlayer.

First claim

1 . A method for processing a substrate, comprising:
depositing an amorphous interlayer atop a first layer on a substrate, wherein the first layer is a metal-containing layer; and depositing a metal layer atop the amorphous interlayer.

2 . The method of claim 1 , wherein the first layer is a barrier layer deposited within a feature formed at least partially in a dielectric layer on the substrate.

3 . The method of claim 1 , wherein the amorphous interlayer is a boron, silicon, or tungsten silicide layer.

4 . The method of claim 1 , wherein the substrate includes a feature formed in the first layer and the amorphous interlayer is deposited atop the first layer and along sidewalls and a bottom the feature.

5 . The method of claim 1 , wherein the first layer is a titanium nitride layer.

6 . The method of claim 5 , wherein the amorphous interlayer is a boron, silicon, or tungsten silicide layer.

7 . The method of claim 1 , wherein the amorphous interlayer is deposited to a thickness of one atomic layer to about 5 nanometers.

8 . The method of claim 1 , wherein the amorphous interlayer is deposited to a thickness of one atomic layer to about 10 angstroms.

9 . The method of claim 1 , wherein the amorphous interlayer and the metal layer are deposited sequentially without vacuum break.

10 . A non-transitory computer readable medium, having instructions stored thereon that, when executed, cause a method for processing a substrate to be performed, the method comprising:
depositing an amorphous interlayer atop a first layer on a substrate, wherein the first layer is a metal-containing layer; and depositing a metal layer atop the amorphous interlayer.

11 . The non-transitory computer readable medium of claim 10 , wherein the amorphous interlayer is a boron, silicon, or tungsten silicide layer.

12 . The non-transitory computer readable medium of claim 10 , wherein the substrate includes a feature formed in the first layer and the amorphous interlayer is deposited atop the first layer and along sidewalls and a bottom the feature.

13 . The non-transitory computer readable medium of claim 10 , wherein the first layer is a titanium nitride layer.

14 . The non-transitory computer readable medium of claim 13 , wherein the amorphous interlayer is a boron, silicon, or tungsten silicide layer.

15 . The non-transitory computer readable medium of claim 10 , wherein the amorphous interlayer is deposited to a thickness of one atomic layer to about 5 nanometers.

16 . The non-transitory computer readable medium of claim 10 , wherein the amorphous interlayer is deposited to a thickness of one atomic layer to about 10 angstroms.

17 . The non-transitory computer readable medium of claim 10 , wherein the amorphous interlayer and the metal layer are deposited sequentially without vacuum break.

18 . A system for processing a substrate, comprising:
an amorphous interlayer deposition chamber configured to deposit an amorphous interlayer atop a first layer on a substrate, wherein the first layer is a metal-containing layer; and a metal layer deposition chamber configured to deposit a metal layer atop the amorphous interlayer.

19 . The system of claim 18 , wherein the amorphous interlayer deposition chamber and the metal layer deposition chamber are part of an integrated tool configured to deposit the metal layer atop the amorphous interlayer without breaking vacuum.

20 . The system of claim 18 , further comprising:
a deposition chamber configured to deposit the first layer atop a dielectric layer of the substrate and within a feature formed in the dielectric layer.

Assignees

• Applied Materials Inc

Inventors

• Patel Sahil Jaykumar
• Zhao Xianyuan
• Lei Wei
• Zhang Aixi
• Xu Yi
• Lei Yu

Classifications

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/047

  by introducing additional elements therein · CPC title

• H10W20/033 Primary

  in openings in dielectrics · CPC title

• H10W20/056 Primary

  by filling conductive material into holes, grooves or trenches · CPC title

• H10P14/432

  using selective deposition · CPC title