Multi-layered ceramic capacitor

US2024096559A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024096559-A1
Application numberUS-202318519368-A
CountryUS
Kind codeA1
Filing dateNov 27, 2023
Priority dateJul 17, 2019
Publication dateMar 21, 2024
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes having different sizes to each other, and having first and second surfaces of the first and second internal electrodes, opposing each other in a stacking direction, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces and connected to the third and fourth surfaces, and opposing each other; and first and second external electrodes. When a margin of the first internal electrode in a longitudinal direction is b, and a margin of the first internal electrode in a width direction is d, a margin of the second internal electrode in a longitudinal direction is a, and a margin of the second internal electrode in a width direction is c, a ratio (a/b) of the margin (a) of the second internal electrode in the longitudinal direction to the margin (b) of the first internal electrode in the longitudinal direction is 0.33 or more (where, a>0 and b>0) or a ratio (c/d) of the margin (c) of the second internal electrode in the width direction to the margin (d) of the first internal electrode in the width direction is 0.33 or more (where, c>0 and d>0).

First claim

Opening claim text (preview).

What is claimed is: 1 . A multilayer ceramic capacitor, comprising: a body including a dielectric layer and first internal electrodes and second internal electrodes having different sizes to each other, and having first and second surfaces opposing each other in a stacking direction, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces and connected to the third and fourth surfaces, and opposing each other; and first and second external electrodes, wherein when a margin of at least two of the first internal electrodes in a longitudinal direction is b, and a margin of a second internal electrode, among the second internal electrodes, in the longitudinal direction is a, a ratio (a/b) is 1 or less and 0.33 or more (where, a>0 and b>0), wherein when a margin of at least two of the first internal electrodes in a width direction is d, and a corresponding margin of a second internal electrode, among the second internal electrodes, in the width direction is c, a ratio (c/d) is 1 or less and 0.33 or more (where, c>0 and d>0), wherein a difference (b−a) between the margin (b) and the margin (a) is 10 μm or more, wherein a difference (d−c) between the margin (d) and the margin (c) is 10 μm or more. 2 . The multilayer ceramic capacitor of claim 1 , wherein the ratio (a/b) is 0.67 or less. 3 . The multilayer ceramic capacitor of claim 1 , wherein the ratio (c/d) is 0.67 or less. 4 . The multilayer ceramic capacitor of claim 1 , wherein a margin of the at least two of the first internal electrodes in a width direction is different than a corresponding margin of the second internal electrode in the width direction. 5 . The multilayer ceramic capacitor of claim 1 , wherein the first and second internal electrodes are connected to the third and fourth surfaces of the body, respectively, and the first and second external electrodes are disposed on the third and fourth surfaces of the body to contact the first and second internal electrodes, respectively. 6 . The multilayer ceramic capacitor of claim 1 , wherein the first and second internal electrodes are connected to the fifth and sixth surfaces of the body, respectively, and the first and second external electrodes are disposed on the fifth and sixth surfaces of the body to contact the first and second internal electrodes, respectively. 7 . The multilayer ceramic capacitor of claim 1 , wherein an average thickness of the first and second internal electrodes is 0.4 μm or less. 8 . The multilayer ceramic capacitor of claim 1 , further comprising a third external electrode, wherein the first internal electrodes are connected to the third surface or the fourth surface of the body, the second internal electrode is disposed to be connected to the fifth and sixth surfaces of the body, the first external electrode is disposed on the third surface of the body, the second external electrode is disposed on the fourth surface of the body, and the third external electrode is connected to the second internal electrode and is disposed on the first, second, fifth, and sixth surfaces of the body. 9 . The multilayer ceramic capacitor of claim 1 , further comprising a third external electrode, wherein the first internal electrodes are connected to the third and fourth surfaces of the body, the second internal electrode is disposed to be connected to the fifth and sixth surfaces of the body, the first and second external electrodes are disposed on the third and fourth surfaces of the body, respectively, and are connected to the first internal electrodes, and the third external electrode is connected to the second internal electrode, and is disposed on the first, second, fifth, and sixth surfaces of the body.

Assignees

Inventors

Classifications

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • H01G2/02Primary

    Mountings · CPC title

  • Form of non-self-supporting electrodes · CPC title

  • based on titanium oxides or titanates (H01G4/1245 takes precedence) · CPC title

  • H01G4/005Primary

    Electrodes · CPC title

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What does patent US2024096559A1 cover?
A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes having different sizes to each other, and having first and second surfaces of the first and second internal electrodes, opposing each other in a stacking direction, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth s…
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Mar 21 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).