Semiconductor Device

Patent metadata

Field	Value
Publication number	US-2023215966-A1
Application number	US-202018000579-A
Country	US
Kind code	A1
Filing date	Jun 5, 2020
Priority date	Jun 5, 2020
Publication date	Jul 6, 2023
Grant date	—

Abstract

A semiconductor device includes a semiconductor layer, which is disposed on the surface of a substrate and causing an oxidation reaction and a reduction reaction when irradiated with light, an oxidation catalyst layer, which is disposed on part of the surface of the semiconductor layer, forms along with the semiconductor layer a Schottky junction, and oxidizes an oxidation target substance, a reduction catalyst layer, which is disposed on part of the surface of the semiconductor layer where the oxidation catalyst layer is not disposed so as to be separated from the oxidation catalyst layer, forms along with the semiconductor layer an ohmic junction, and reduces a reduction target substance, and an insulation layer, which is disposed on the entirety of the surface of the semiconductor layer where none of the oxidation catalyst layer and the reduction catalyst layer is disposed so as to be in contact with the oxidation catalyst layer and the reduction catalyst layer.

First claim

1 . A semiconductor device comprising:
a semiconductor layer disposed on a surface of a substrate and causing an oxidation reaction and a reduction reaction when irradiated with light; an oxidation catalyst layer that is disposed on part of a surface of the semiconductor layer, forms along with the semiconductor layer a Schottky junction, and oxidizes an oxidation target substance; a reduction catalyst layer that is disposed on part of the surface of the semiconductor layer where the oxidation catalyst layer is not disposed so as to be separated from the oxidation catalyst layer, forms along with the semiconductor layer an ohmic junction, and reduces a reduction target substance; and an insulation layer that is disposed on entirety of the surface of the semiconductor layer where none of the oxidation catalyst layer and the reduction catalyst layer is disposed so as to be in contact with the oxidation catalyst layer and the reduction catalyst layer, and transmits the light with which the semiconductor layer is irradiated, wherein the surface of the semiconductor layer is entirely coated with the oxidation catalyst layer, the reduction catalyst layer, and the insulation layer.

2 . The semiconductor device according to claim 1 ,
wherein the insulation layer has a shape of a lattice in a plan view of the surface of the semiconductor layer, and the oxidation catalyst layer and the reduction catalyst layer are formed on the surface of the semiconductor layer in a plurality of no-insulation-layer-formation regions formed by the lattice-shaped insulation layer with the no-insulation-layer-formation regions for the oxidation catalyst layers being different from the no-insulation-layer-formation regions for the reduction catalyst layers.

3 . The semiconductor device according to claim 1 ,
wherein a bandgap of the insulation layer is wider than a bandgap of the semiconductor layer.

4 . The semiconductor device according to claim 1 ,
wherein the semiconductor layer is a layer made of a nitride semiconductor, specifically, a layer made of an n-type gallium nitride or a layer that is a laminate of a plurality of nitride semiconductors having an n-type gallium nitride layer disposed on a side facing the substrate, the oxidation catalyst layer is a layer made of a metal oxide, the reduction catalyst layer is a layer made of a single metal or a layer that is a laminate of a plurality of metals, and the insulation layer is a layer made of an oxide.

5 . The semiconductor device according to claim 2 ,
wherein a bandgap of the insulation layer is wider than a bandgap of the semiconductor layer.

6 . The semiconductor device according to claim 2 ,
wherein the semiconductor layer is a layer made of a nitride semiconductor, specifically, a layer made of an n-type gallium nitride or a layer that is a laminate of a plurality of nitride semiconductors having an n-type gallium nitride layer disposed on a side facing the substrate, the oxidation catalyst layer is a layer made of a metal oxide, the reduction catalyst layer is a layer made of a single metal or a layer that is a laminate of a plurality of metals, and the insulation layer is a layer made of an oxide.

7 . The semiconductor device according to claim 3 ,
wherein the semiconductor layer is a layer made of a nitride semiconductor, specifically, a layer made of an n-type gallium nitride or a layer that is a laminate of a plurality of nitride semiconductors having an n-type gallium nitride layer disposed on a side facing the substrate, the oxidation catalyst layer is a layer made of a metal oxide, the reduction catalyst layer is a layer made of a single metal or a layer that is a laminate of a plurality of metals, and the insulation layer is a layer made of an oxide.

Assignees

• Nippon Telegraph & Telephone

Inventors

• Ono Yoko
• Uzumaki Yuya
• Sato Sayumi
• Komatsu Takeshi

Classifications

• H10F77/1246

  III-V nitrides, e.g. GaN · CPC title

• H10F30/227 Primary

  the potential barrier being a Schottky barrier · CPC title

• H01L31/108 Primary

  Electricity · mapped topic

• H01L31/03044

  Electricity · mapped topic

• B01J23/75

  Cobalt · CPC title