Display device

Patent metadata

Field	Value
Publication number	US-2023189587-A1
Application number	US-202217972248-A
Country	US
Kind code	A1
Filing date	Oct 24, 2022
Priority date	Dec 10, 2021
Publication date	Jun 15, 2023
Grant date	—

Abstract

According to an aspect of the present disclosure, a display device includes a substrate including a display area in which a plurality of sub-pixels are disposed, and a non-display area. The display device includes a plurality of signal lines extending from the display area to the non-display area and configured to transmit an alternating current voltage. The display device includes a semiconductor layer disposed between the substrate and the plurality of signal lines and overlapping the plurality of signal lines.

First claim

1 . A display device comprising:
a substrate having thereon a display area in which a plurality of sub-pixels is disposed, and a non-display area; a plurality of signal lines extending from the display area to the non-display area, the plurality of signal lines being configured to transmit an alternating current voltage; and a semiconductor layer disposed between the substrate and the plurality of signal lines and overlapping the plurality of signal lines.

2 . The display device of claim 1 , wherein the substrate is made of transparent conductive oxide.

3 . The display device of claim 2 , wherein the semiconductor layer is made of any one of an oxide semiconductor, amorphous silicon, and polysilicon.

4 . The display device of claim 2 , wherein the semiconductor layer is either an N-type semiconductor layer or a P-type semiconductor layer.

5 . The display device of claim 1 , wherein the substrate is made of a transparent semiconductor material.

6 . The display device of claim 5 , wherein the semiconductor layer is made of any one of amorphous silicon and polysilicon.

7 . The display device of claim 5 , wherein the semiconductor layer is a P-type semiconductor layer.

8 . The display device of claim 1 , wherein the plurality of signal lines includes a plurality of gate lines.

9 . The display device of claim 1 , wherein the plurality of signal lines includes a plurality of data lines and a plurality of reference lines.

10 . The display device of claim 1 , wherein the plurality of signal lines includes a plurality of high-potential power lines.

11 . The display device of claim 1 , wherein each of the plurality of sub-pixels include a light-emitting area, and
wherein the semiconductor layer is disposed on an area excluding the light-emitting area.

12 . The display device of claim 1 , further comprising:
a gate drive circuit disposed in the non-display area and coupled to the plurality of gate lines, wherein the semiconductor layer is disposed to overlap a line disposed on a same layer as the plurality of gate lines, wherein the line is included in the gate drive circuit.

13 . A display device, comprising:
a substrate made of an oxide material; a semiconductor layer disposed on the substrate; an insulating layer disposed on the semiconductor layer; at least one sub-pixel on the substrate, the at least one sub-pixel including:
a light-emitting element; and
a transistor coupled to the light-emitting element; and
a plurality of signal lines coupled to the at least one sub-pixel; wherein the semiconductor layer is disposed between the substrate and the plurality of signal lines and overlapping the plurality of signal lines.

14 . The display device of claim 13 , wherein the substrate consists of a transparent conductive oxide.

15 . The display device of claim 13 , wherein the
insulating layer is between the transistor and the substrate; and the semiconductor is between the insulating layer and the substrate.

16 . The display device of claim 13 , wherein the plurality of signal lines include:
a gate line configured to transmit gate voltages to the at least one sub-pixel, wherein the semiconductor layer overlaps the gate line.

17 . The display device of claim 13 , wherein the plurality of signal lines include:
a data line configured to transmit data voltages to the at least one sub-pixel; a reference line configured to transmit data voltages to the at least one sub-pixel; and wherein the semiconductor layer overlaps the data line and the reference line.

18 . The display device of claim 13 , wherein the plurality of signal lines include:
a high-potential power line configured to transmit high power voltages to the at least one sub-pixel, wherein the semiconductor layer overlaps the high-potential power line.

19 . The display device of claim 13 , comprising:
a light-emitting area between adjacent bank layers, the light emitting area including the light-emitting element, wherein the semiconductor layer overlaps the at least one sub-pixel except for the light-emitting area.

20 . The display device of claim 13 , wherein the plurality of signal lines, in operation, transmits an alternating current voltage.

Assignees

• Lg Display Co Ltd

Inventors

• Song Jihun
• Yohn Gyujae

Classifications

• H10K71/80

  using temporary substrates · CPC title

• H10K59/1216

  the pixel elements being capacitors · CPC title

• H10K77/111

  Flexible substrates · CPC title

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10K59/1213

  the pixel elements being TFTs · CPC title