Dual plate olet displays

US2023055348A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2023055348-A1
Application numberUS-202017795016-A
CountryUS
Kind codeA1
Filing dateFeb 11, 2020
Priority dateFeb 11, 2020
Publication dateFeb 23, 2023
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An example dual plate Organic Light-Emitting Field-Effect Transistor (OLET) display device includes a first plate device having a first substrate; a gate layer adjacent to the first substrate; and a dielectric layer adjacent to the gate layer. A second plate device is connected to the first plate device. The second plate device includes a second substrate; a source/drain layer adjacent to the second substrate; and a stacked active organic layer adjacent to the source/drain layer. The first plate device and the second plate device are to be independently fabricated and joined together to position the stacked active organic layer adjacent to the dielectric layer.

First claim

Opening claim text (preview).

What is claimed is: 1 . A dual plate Organic Light-Emitting Field-Effect Transistor (OLET) display device comprising: a first plate device comprising: a first substrate; a gate layer adjacent to the first substrate; and a dielectric layer adjacent to the gate layer; a second plate device connected to the first plate device, wherein the second plate device comprises: a second substrate; a source/drain layer adjacent to the second substrate; and a stacked active organic layer adjacent to the source/drain layer, wherein the first plate device and the second plate device are to be independently fabricated and joined together to position the stacked active organic layer adjacent to the dielectric layer. 2 . The device of claim 1 , wherein the source/drain layer comprises: a first side comprising a first planar surface contacting the second substrate; and a second side opposite to the first side, wherein an entirety of the second side comprises a second planar surface contacting the stacked active organic layer. 3 . The device of claim 2 , wherein the stacked active organic layer comprises: an n-type transport layer; an emitting layer partially surrounding the n-type transport layer; and a p-type transport layer partially surrounding the emitting layer. 4 . The device of claim 3 , wherein the n-type transport layer contacts the second planar surface and the second substrate, wherein the p-type transport layer contacts the second planar surface, and wherein the emitting layer contacts the second planar surface. 5 . The device of claim 3 , wherein the emitting layer surrounds three sides of the n-type transport layer, wherein the p-type transport layer surrounds three sides of the emitting layer, and wherein the p-type transport layer surrounds three sides of the n-type transport layer. 6 . The device of claim 2 , wherein the stacked active organic layer comprises: a p-type transport layer; an emitting layer partially surrounding the p-type transport layer; and an n-type transport layer partially surrounding the emitting layer. 7 . A dual plate Organic Light-Emitting Field-Effect Transistor (OLET) display device comprising: a first substrate; a gate layer contacting the first substrate; a dielectric layer contacting the gate layer; a stacked active organic layer contacting the dielectric layer; a pair of source electrodes contacting the stacked active organic layer; a drain electrode contacting the stacked active organic layer, wherein the in electrode is aligned and spaced apart from the pair of source electrodes; and a second substrate contacting the pair of source electrodes, the drain electrode, and a portion of the stacked active organic layer, wherein the first substrate, the gate layer, and the dielectric layer are fabricated together prior to connecting the dielectric layer to the stacked active organic layer. 8 . The device of claim 7 , wherein each side of the pair of source electrodes and the drain electrode is planar, and wherein a gap between the drain electrode and a source electrode of the pair of source electrodes is less than 3 μm. 9 . The device of claim 8 , wherein the stacked active organic layer comprises: an n-type transport layer that fills the gap and contacts the second substrate; an emitting layer partially surrounding the n-type transport layer; and a p-type transport layer partially surrounding the emitting layer, wherein the p-type transport layer contacts the dielectric layer. 10 . The device of claim 8 , wherein the stacked active organic layer comprises: a p-type transport layer that fills the gap and contacts the second substrate; an emitting layer partially surrounding the p-type transport layer; and an n-type transport layer partially surrounding the emitting layer, wherein the n-type transport layer contacts the dielectric layer. 11 . A method of manufacturing a semiconductor device, the method comprising: forming a first Organic Light-Emitting Field-Effect Transistor (OLET) display device; forming a second OLET display device independently of the first OLET display device; and attaching the first OLET display device to the second OLET display device. 12 . The method of claim 11 , wherein forming the first OLET display device comprises: providing a first substrate; depositing a gate layer on the first substrate; and depositing a dielectric layer on the gate layer. 13 . The method of claim 12 , wherein forming the second OLET display device comprises: providing a second substrate; depositing a source/drain layer on the second substrate; patterning the source/drain layer such that each surface of patterned source and drain electrodes are planar; and depositing a stacked active organic layer on the source/drain layer. 14 . The method of claim 13 , wherein depositing the stacked active organic layer comprises: depositing an n-type transport layer that fills gaps in the patterned source/drain layer, wherein the n-type transport layer contacts the second substrate and source and drain electrodes in the source/drain layer; depositing an emitting layer on the n-type transport layer, wherein the emitting layer contacts source electrodes in the source/drain layer; and depositing a p-type transport layer on the emitting layer, wherein the p-type transport layer contacts the source electrodes in the source/drain layer. 15 . The method of claim 13 , wherein depositing the stacked active organic layer comprises: depositing a p-type transport layer that fills gaps in the patterned source/drain layer, wherein the p-type transport layer contacts the second substrate and source and drain electrodes in the source/drain layer; depositing an emitting layer on the p-type transport layer, wherein the emitting layer contacts source electrodes in the source/drain layer; and depositing an n-type transport layer on the emitting layer, wherein the n-type transport layer contacts the source electrodes in the source/drain layer.

Assignees

Inventors

Classifications

  • the IGFET comprising multiple separately-addressable gate electrodes · CPC title

  • Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

  • Active-matrix OLED [AMOLED] displays · CPC title

  • H10K50/30Primary

    Organic light-emitting transistors · CPC title

  • Manufacture or treatment · CPC title

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Frequently asked questions

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What does patent US2023055348A1 cover?
An example dual plate Organic Light-Emitting Field-Effect Transistor (OLET) display device includes a first plate device having a first substrate; a gate layer adjacent to the first substrate; and a dielectric layer adjacent to the gate layer. A second plate device is connected to the first plate device. The second plate device includes a second substrate; a source/drain layer adjacent to the s…
Who is the assignee on this patent?
Hewlett Packard Development Co
What technology area does this patent fall under?
Primary CPC classification H10K50/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Feb 23 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).