SYSTEM AND METHOD FOR MEASURING INTERMITTENT OPERATING LIFE OF GaN-BASED DEVICE

Patent metadata

Field	Value
Publication number	US-2022381815-A1
Application number	US-202117419309-A
Country	US
Kind code	A1
Filing date	Feb 26, 2021
Priority date	Feb 26, 2021
Publication date	Dec 1, 2022
Grant date	—

Abstract

The present invention provides a system and method for measuring intermittent operating life (IOL) of a GaN-based device under test (DUT) is provided. The system is operable in a stressing mode, a cooling mode and a measure mode. A power regulation approach is adopted to ensure that DUT of the same thermal resistance have same temperature increase during the IOL test. The present invention eliminates the influence caused by parasitic parameters of testing circuits and the inconsistency of threshold voltage and drain-source resistance of the device itself. Through power regulation, it is the junction temperature of the device, not the housing temperature of the device, being directly controlled. Therefore, higher measurement accuracy can be achieved.

First claim

1 . A system for measuring intermittent operating life (IOL) of a GaN-based device under test (DUT), the system is operable in a stressing mode, a cooling mode and a measure mode, and comprising:
a controlling unit configured for detecting a signal VD_IM from a drain terminal of the DUT and a signal VS_IM from a source terminal of the DUT and computing a drain-source resistance R ds of the DUT when the system is operated in the measure mode; a stressing unit configured for applying a regulated stressing power P str to the DUT to increase a junction temperature of the DUT to a ON-junction temperature T jON when the system is operated in the stressing mode, wherein the regulated stressing power P str is given by P str =I ds_str *V ds_str , where I ds_str is a regulated drain-source current passing through the DUT and V ds_str is a regulated drain-source voltage V ds_str across the DUT; a cooling unit configured for cooling the DUT to decrease the junction temperature of the DUT to an OFF junction temperature T jOFF ; a gate-bias unit configured to receive a control signal VG_M from the controlling unit to turn on the DUT when the system is operated in the measure mode; and receive a control signal VG_OFF from the controlling unit to turn off the DUT when the system is operated in the cooling mode; and a measure-bias unit configured to receive a reference signal IM_Ctrl from the controlling unit and supply a regulated drain-source current I ds_mea to the DUT when the testing system is operated in the measure mode;
wherein the controlling unit is further configured to
determine the drain-source resistance R ds to be a ON-drain-source resistance R ds_ON of the DUT if the drain-source resistance R ds is obtained when the junction temperature of the DUT reaches a ON-junction temperature T jON ; and
determine the drain-source resistance R ds to be an OFF-drain-source resistance R ds_OFF of the DUT if the drain-source resistance R ds is obtained when the junction temperature of the DUT reaches an OFF junction temperature T jOFF .

2 . The system according to claim 1 , wherein the T jON is given by T jON =P str ×R th(j-a) +T a , where T a is the ambient temperature and R th(j-a) is the junction thermal resistance of the DUT at the ambient temperature T a .

3 . The system according to claim 1 , wherein the OFF junction temperature T jOFF is given by T jOFF =T a , where T a is the ambient temperature.

4 . The system according to claim 1 , wherein the stressing unit is further configured to:
receive a first reference signal Vds_Ctrl and a second reference signal Ids_Ctrl from the controlling unit; detect the signal VD_IM from the drain terminal of the DUT and the signal VS_IM from the source terminal of the DUT; control a voltage applied to the drain terminal of the DUT based on the received reference signals Vds_Ctrl and the detected signal VD_IM to regulate the drain-source voltage V ds_str to be equal to Vds_Ctrl; and control a voltage applied to the VG node based on the received reference signals Ids_Ctrl and the detected signal VS_IM to regulate a drain-source current I ds_str to be equal to

Ids_Ctrl

R
⁢
1

.

5 . (canceled)

6 . The system according to claim 1 , further comprising a fourth diode D 4 have a cathode coupled to the drain terminal of the DUT, and configured for allowing the drain-source current I ds_str flowing only in one direction from the stressing unit to the drain terminal of the DUT.

7 . The system according to claim 6 , further comprising a fourth switching device M 4 having a drain terminal connected to the stressing unit; a source terminal connected to an anode of the fourth diode D 4 ; and a gate terminal connected to the controlling unit.

8 . The system according to claim 7 , wherein the controlling unit is further configured to
turn on the fourth switching device M 4 to conduct the drain-source current I ds_str flowing from the stressing unit to the drain terminal of the DUT when the system is operated in the stressing mode; and turn off the fourth switching device M 4 to block the drain-source current I ds_str flowing from the stressing unit to the drain terminal of the DUT when the system is not operated in the stressing mode.

9 . The system according to claim 1 , further comprising a fifth diode D 5 having a cathode connected to the drain terminal of the DUT and configured for allowing the drain-source current I ds_mea flowing only in one direction from the measure-bias unit to the drain terminal of the DUT.

10 . The system according to claim 9 , further comprising a sixth switching device M 6 having a drain terminal connected to the measure-bias unit; a source terminal connected to the anode of the fifth diode D 5 ; and a gate terminal connected to the controlling unit for receiving the control signal S/M.

11 . The system according to claim 9 , wherein controlling unit is configured to turn on the sixth switching device M 6 to conduct the drain-source current I ds_mea flowing from the measure-bias unit to the drain terminal of the DUT when the testing system is operated in the measure mode; and turn off the sixth switching device M 6 to block the drain-source current I ds_mea flowing from the measure-bias unit to the drain terminal of the DUT when the system is not operated in the measure mode.

12 . The system according to claim 1 , wherein the cooling unit comprises a fan configured to receive a control signal Air_Ctrl from the controlling unit and generate a flow of air surrounding the DUT to cool down the DUT.

13 . The system according to claim 1 , further comprising a man-machine interfacing unit configured for facilitating a user to select and set up operation modes and displaying operation setting menus and measurement results.

14 . The system according to claim 1 , further comprising a storage unit configured for storing operation setting parameters and measurement results.

15 . A method for measuring intermittent operating life (IOL) of GaN-based devices under test (DUT) having a source terminal, a drain terminal and a gate terminal, the method comprising:
stressing, by a stressing unit, the DUT by applying a regulated stressing power P str to the DUT to increase a junction temperature of the DUT to a ON-junction temperature T jON ; wherein the regulated stressing power P str is given by P str =I ds_str *V ds_str , where I ds_str is a regulated drain-source current I ds_str passing through the DUT, and V ds_str is a regulated drain-source voltage across the DUT; measuring, by a controlling unit, a drain-to-source resistance R ds of the DUT and determine the drain-source resistance R ds to be a ON-drain-source resistance R ds_ON of the DUT when the junction temperature of the DUT reaches the ON-junction temperature T jON ; cooling, by a cooling unit, the DUT to decrease the junction temperature of the DUT to an OFF junction temperature T jOFF ; and measuring, by the controlling unit, the drain-to-source resistance R ds of the DUT and determine the drain-source resistance R ds to be an OFF-drain-source resistance R ds_OFF of the DUT when the junction temperature of the DUT reaches the OFF junction temperature T jOFF .

16 . The method according to claim 15 , wherein the T jON is given by T ON =P str ×R th(j-a) +T a , where T a is the ambient temperatu

Assignees

• Innoscience Suzhou Technology Holding Co Ltd

Inventors

• Chen Chang
• Zhou Chunhua
• Li sichao
• Yang Rong
• Bai Donghua
• Huang Jiabiao

Classifications

• G01R31/2628 Primary

  for measuring thermal properties thereof · CPC title

• G01R31/2619

  for measuring thermal properties thereof · CPC title

• G01R31/2617

  for measuring switching properties thereof · CPC title

• G01R31/2642 Primary

  Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests · CPC title

• G01R31/2621

  for testing field effect transistors, i.e. FET's · CPC title