Systems and methods for dynamic Rdson measurement

Patent metadata

Field	Value
Publication number	US-10101382-B2
Application number	US-201615395907-A
Country	US
Kind code	B2
Filing date	Dec 30, 2016
Priority date	Dec 30, 2016
Publication date	Oct 16, 2018
Grant date	Oct 16, 2018

Abstract

In at least some embodiments, a system comprises a socket gate terminal configured to receive a first voltage to activate and inactivate a device under test (DUT) coupled to the socket gate terminal. The system also comprises a socket source terminal configured to provide a reference voltage to the DUT. The system further comprises a socket drain terminal configured to provide a second voltage to the DUT to stress the DUT when the DUT is inactive. The socket drain terminal is further configured to receive a third voltage to cause a current to flow through a pathway in the DUT between the socket drain terminal and the socket source terminal when the DUT is active. The socket drain terminal is further configured to provide a fourth voltage indicative of a resistance of the pathway in the DUT when the DUT is active and is heated to a temperature above an ambient temperature associated with the system.

First claim

What is claimed is:

1. A system, comprising:
a socket gate terminal configured to receive a first voltage to activate and inactivate a device under test (DUT) coupled to the socket gate terminal;
a socket source terminal configured to provide a reference voltage to the DUT; and
a socket drain terminal configured to provide a second voltage to the DUT to stress the DUT when the DUT is inactive, the socket drain terminal further configured to receive a third voltage to cause a current to flow through a pathway in the DUT between the socket drain terminal and the socket source terminal when the DUT is active, the socket drain terminal further configured to provide a fourth voltage indicative of a resistance of the pathway in the DUT when the DUT is active and is heated to a temperature above an ambient temperature associated with the system.

2. The system of claim 1 , further comprising a driver coupled to the socket gate terminal and configured to provide the first voltage.

3. The system of claim 2 , further comprising a decoder coupled to the driver and configured to enable and disable the driver in accordance with an enable signal and with a digital code corresponding to the driver.

4. The system of claim 1 , further comprising a first power supply coupled to the socket drain terminal and configured to provide the second voltage to the socket drain terminal.

5. The system of claim 4 , further comprising a second power supply coupled to the socket drain terminal and configured to provide the third voltage to the socket drain terminal.

6. The system of claim 1 , wherein the second voltage is higher than the third voltage.

7. The system of claim 1 , further comprising an analog-to-digital converter (ADC) coupled to the socket drain terminal and configured to provide a digital representation based on the fourth voltage present at the socket drain terminal.

8. The system of claim 1 , further comprising multiple, additional sockets configured to couple to different DUTs, and further comprising a plurality of drivers configured to activate the different DUTs sequentially.

9. The system of claim 1 , further comprising a calibration fixture comprising another socket gate terminal, another socket source terminal, another socket drain terminal, a fuse coupled to the another socket drain terminal, and a diode coupled to the fuse, wherein a voltage drop across the fuse and the diode indicates a stability level of the temperature.

10. The system of claim 9 , further comprising a controller subsystem configured to measure a signal that is based on the fourth voltage when the voltage drop indicates that the temperature has stabilized at a preselected level.

11. A system, comprising:
a plurality of sockets, each socket comprising drain, source, and gate terminals and configured to receive a device under test (DUT);
a first power supply configured to provide a stress voltage to each of the DUTs via the drain terminals;
a plurality of drivers, each driver coupled to a different one of the gate terminals and configured to provide a first voltage to each of the gate terminals to activate the DUT corresponding to that gate terminal;
a second power supply coupled to each of the plurality of sockets via a diode and a fuse, the second power supply configured to cause a drain-source current to flow between the drain and source terminals via the DUT in each of the plurality of sockets when the DUT is activated; and
a controller subsystem coupled to the plurality of sockets and configured to measure a second voltage for each of the plurality of sockets, the second voltage includes a drain-source voltage between the drain and source terminals for that socket,
wherein the controller subsystem is configured to perform the measurements when the system corresponds to a temperature within a preselected temperature range.

12. The system of claim 11 , further comprising a calibration fixture comprising another diode and another fuse coupled to another socket, and wherein the controller subsystem monitors a total voltage across the another diode and the another fuse to determine whether the temperature is within the preselected temperature range.

Assignees

• Texas Instruments Inc

Inventors

• Paikin Alex
• Johnson Colin
• Chatterjee Tathagata
• Pendharkar Sameer

Classifications

• G01R31/2849

  Environmental or reliability testing, e.g. burn-in or validation tests (of individual semiconductors G01R31/2642; of printed circuits boards G01R31/2817; of IC's G01R31/2855) · CPC title

• G01R31/2642

  Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests · CPC title

• G01R31/2628 Primary

  for measuring thermal properties thereof · CPC title