Semiconductor device package, antenna device, and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-2022319972-A1
Application number	US-202117223932-A
Country	US
Kind code	A1
Filing date	Apr 6, 2021
Priority date	Apr 6, 2021
Publication date	Oct 6, 2022
Grant date	—

Abstract

A semiconductor device package and method for manufacturing the same are provided. The semiconductor device package includes a dielectric layer, an electronic component, a first conductive layer, and a conductive element. The dielectric layer has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the dielectric layer. The first conductive layer is embedded in the dielectric layer and adjacent to the first surface of the dielectric layer. The conductive element is disposed on the first surface of the dielectric layer and in contact with the first conductive layer.

First claim

What is claimed is:

1 . A semiconductor device package, comprising:
a dielectric layer having a first surface and a second surface opposite to the first surface, an electronic component embedded in the dielectric layer; a first conductive layer embedded in the dielectric layer and adjacent to the first surface of the dielectric layer; a conductive element disposed on the first surface of the dielectric layer and in contact with the first conductive layer.

2 . The semiconductor device package of claim 1 , further comprising an antenna disposed on the second surface of the dielectric layer, wherein the electronic component has an active surface facing away from the antenna.

3 . The semiconductor device package of claim 2 , further comprising a shielding layer embedded in the dielectric layer and disposed between the antenna and the electronic component.

4 . The semiconductor device package of claim 1 , wherein the conductive element comprises a first seed layer in contact with the first conductive layer and a second seed layer disposed on the first seed layer.

5 . The semiconductor device package of claim 4 , wherein the conductive element further comprises a conductive layer disposed on the second seed layer.

6 . The semiconductor device package of claim 4 , wherein the conductive element further comprises a conductive via, wherein the second seed layer is disposed along a sidewall of the conductive via.

7 . The semiconductor device package of claim 4 , further comprising a connection element disposed on the second portion of the first conductive layer.

8 . The semiconductor device package of claim 1 , further comprising a shielding layer in contact with a backside of the electronic component.

9 . The semiconductor device package of claim 1 , wherein the electronic component has a displacement relative to the first conductive layer in a direction substantially parallel with the first surface of the dielectric layer.

10 . The semiconductor device package of claim 1 , wherein the first conductive layer has a projection area on the first surface of the dielectric layer and the conductive element has a projection area on the first surface of the dielectric layer, and the projection area of the first conductive layer is overlapped with a first portion of the projection area of the conductive element.

11 . The semiconductor device package of claim 10 , wherein the electronic component has a projection area on the first surface of the dielectric layer, and the projection area of the electronic component is overlapped with a second portion of the projection area of the conductive element.

12 . The semiconductor device package of claim 1 , wherein an electrical transmission path is established from the electronic component to the first conductive layer through the conductive element.

13 . An antenna device, comprising:
a dielectric layer having a first surface and a second surface opposite to the first surface, an antenna disposed on the second surface of the dielectric layer; a first conductive layer disposed in the dielectric layer; and a conductive element disposed on the first surface of the dielectric layer and electrically connected to the antenna through the first conductive layer; wherein the first conductive layer has a first portion exposed from the conductive element and a second portion in contact with the conductive element.

14 . The antenna device of claim 13 , further comprising an electronic component disposed in the dielectric layer and electrically connected to the antenna by the conductive element and the first conductive layer.

15 . The antenna device of claim 14 , wherein the conductive element further comprises a conductive via electrically connected to an active surface of the electronic component.

16 . The antenna device of claim 13 , wherein the conductive element comprises a first seed layer in contact with the first conductive layer and a second seed layer disposed on the first seed layer

17 . The antenna device of claim 14 , wherein the shielding layer disposed in the dielectric layer and between the antenna and the electronic component.

18 . The semiconductor device package of claim 13 , further comprising a connection element disposed on the first conductive layer and a conductive element disposed between the first conductive layer and the connection element.

19 . A method of manufacturing a semiconductor device package, comprising:
providing a dielectric layer and a conductive layer embedded in the dielectric layer; attaching an electronic component to the dielectric layer; and forming a conductive element to be in contact with an exposed surface of the conductive layer, wherein the electronic component is electrically connected to the conductive layer through the conductive element.

20 . The method of claim 19 , wherein forming the conductive element comprises:
forming a conductive via extending through the dielectric layer, wherein the electronic component is electrically connected to the conductive via.

Assignees

• Advanced Semiconductor Eng

Inventors

• Yen You-Lung
• Appelt Bernd Karl

Classifications

• H10W70/093

  Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title

• H10W72/073

  of die-attach connectors · CPC title

• H10W72/9413

  on encapsulations · CPC title

• H10W44/248

  for antennas · CPC title

• H10W70/09

  extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs · CPC title