Electronic device bonding structure and fabrication method thereof

Patent metadata

Field	Value
Publication number	US-2022068872-A1
Application number	US-202017030380-A
Country	US
Kind code	A1
Filing date	Sep 24, 2020
Priority date	Aug 31, 2020
Publication date	Mar 3, 2022
Grant date	—

Abstract

A fabrication method of an electronic device bonding structure includes the following steps. A first electronic component including a first conductive bonding portion is provided. A second electronic component including a second conductive bonding portion is provided. A first organic polymer layer is formed on the first conductive bonding portion. A second organic polymer layer is formed on the second conductive bonding portion. Bonding is performed on the first electronic component and the second electronic component through the first conductive bonding portion and the second conductive bonding portion, such that the first electronic component and the second electronic component are electrically connected. The first organic polymer layer and the second organic polymer layer diffuse into the first conductive bonding portion and the second conductive bonding portion after the bonding. An electronic device bonding structure is also provided.

First claim

1 . A fabrication method of an electronic device bonding structure, comprising:
providing a first electronic component comprising a first conductive bonding portion; providing a second electronic component comprising a second conductive bonding portion; forming a first organic polymer layer on the first conductive bonding portion; forming a second organic polymer layer on the second conductive bonding portion; performing bonding on the first electronic component and the second electronic component through the first conductive bonding portion and the second conductive bonding portion, such that the first electronic component and the second electronic component are electrically connected, wherein the first organic polymer layer and the second organic polymer layer diffuse into the first conductive bonding portion and the second conductive bonding portion after the bonding.

2 . The fabrication method of the electronic device bonding structure according to claim 1 , wherein the first conductive bonding portion and the second conductive bonding portion are metal-to-metal bonding.

3 . The fabrication method of the electronic device bonding structure according to claim 1 , wherein a method for forming the first organic polymer layer and the second organic polymer layer is to perform a wet process on the first conductive bonding portion and the second conductive bonding portion by using an organic polymer solution.

4 . The fabrication method of the electronic device bonding structure according to claim 3 , wherein the step of performing the wet process comprises:
immersing the first conductive bonding portion and the second conductive bonding portion into the organic polymer solution; or spraying the organic polymer solution on the first conductive bonding portion and the second conductive bonding portion.

5 . The fabrication method of the electronic device bonding structure according to claim 3 , wherein the organic polymer solution comprises a compound having a nitrogen-containing functional group, a sulfur-containing functional group, or a combination of the foregoing when a material of the first conductive bonding portion and a material of the second conductive bonding portion are copper.

6 . The fabrication method of the electronic device bonding structure according to claim 1 , wherein a thickness of each of the first organic polymer layer and the second organic polymer layer is at least less than 2 micrometers before the bonding.

7 . The fabrication method of the electronic device bonding structure according to claim 1 , wherein before the bonding is performed:
the first organic polymer layer completely covers an exposed surface of the first conductive bonding portion, and the second organic polymer layer completely covers an exposed surface of the second conductive bonding portion.

8 . The fabrication method of the electronic device bonding structure according to claim 1 , wherein an amount of the first organic polymer layer and an amount of the second organic polymer layer gradually decrease when the bonding is performed.

9 . The fabrication method of the electronic device bonding structure according to claim 1 , wherein a material of the first organic polymer layer is identical to a material of the second organic polymer layer.

10 . The fabrication method of the electronic device bonding structure according to claim 1 , wherein a material of the first organic polymer layer and a material of the second organic polymer layer are not conductive.

11 . The fabrication method of the electronic device bonding structure according to claim 1 , wherein the bonding performed on the first electronic component and the second electronic component is performed through a thermal lamination process.

12 . The fabrication method of the electronic device bonding structure according to claim 1 , wherein:
the first organic polymer layer is further formed on a surface of first electronic component opposite to the first conductive bonding portion, and the second organic polymer layer is further formed on a surface of second electronic component opposite to the second conductive bonding portion.

13 . An electronic device bonding structure, comprising:
a first electronic component, comprising a first conductive bonding portion; and a second electronic component, comprising a second conductive bonding portion, wherein: the second conductive bonding portion is bonded to the first conductive bonding portion, such that the first electronic component and the second electronic component are electrically connected, and dies in the first conductive bonding portion and dies in the second conductive bonding portion have a refinement die distribution structure.

14 . The electronic device bonding structure according to claim 13 , wherein the refinement die distribution structure is a structure in which sizes of part of the dies in the first conductive bonding portion and the second conductive bonding portion close to a bonding junction of the first conductive bonding portion and the second conductive bonding portion are less than sizes of part of the dies away from the bonding junction of the first conductive bonding portion and the second conductive bonding portion.

15 . The electronic device bonding structure according to claim 13 , wherein the first electronic component and the second electronic component comprise wafer-to-wafer bonding or circuit substrate-to-circuit substrate bonding.

16 . The electronic device bonding structure according to claim 13 , wherein the first conductive bonding portion and the second conductive bonding portion respectively are a conductive bump and a conductive pad.

17 . The electronic device bonding structure according to claim 13 , wherein a plurality of the first conductive bonding portions and a plurality of the second conductive bonding portions are provided, and a cavity is formed between adjacent first conductive bonding portions and between adjacent second conductive bonding portions.

18 . The electronic device bonding structure according to claim 17 , wherein the cavity does not have an underfill.

19 . The electronic device bonding structure according to claim 13 , wherein the first conductive bonding portion directly contacts the second conductive bonding portion.

20 . The electronic device bonding structure according to claim 13 , further comprising:
a first organic polymer layer, located on a surface of the first electronic component opposite to the first conductive bonding portion; and a second organic polymer layer, located on a surface of the second electronic component opposite to the second conductive bonding portion.

Assignees

• Unimicron Technology Corp

Inventors

• Hsu Chia-Fu
• Yang Kai-Ming
• Lin Pu-Ju
• Ko Cheng-Ta

Classifications

• H10W90/722

  between stacked chips · CPC title

• H10W80/327

  characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers · CPC title

• H10W80/314

  characterized by direct bonding of pads or other interconnections · CPC title

• H10W72/241

  Dispositions, e.g. layouts · CPC title

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title