Method for manufacturing wiring board, and wiring board

Patent metadata

Field	Value
Publication number	US-2022007506-A1
Application number	US-202117366417-A
Country	US
Kind code	A1
Filing date	Jul 2, 2021
Priority date	Jul 6, 2020
Publication date	Jan 6, 2022
Grant date	—

Abstract

A method for manufacturing a wiring board capable of improving adhesion between an underlayer and a seed layer. An electrically conductive underlayer is disposed on the surface of an insulating substrate and a seed layer containing metal is disposed on the surface of the underlayer to prepare a substrate with seed-layer. A diffusion layer in which elements forming the underlayer and seed layer are mutually diffused is formed between the underlayer and the seed layer, by irradiating the seed layer with a laser beam. A metal layer is formed on the surface of the seed layer by disposing a solid electrolyte membrane between an anode and the seed layer as a cathode and applying voltage between the anode and the underlayer. An exposed portion without the seed layer of the underlayer is removed from the insulating substrate.

First claim

What is claimed is:

1 . A method for manufacturing a wiring board including an insulating substrate, and a wiring layer disposed on a surface of the insulating substrate and having a predetermined wiring pattern, the method comprising:
preparing a substrate with seed-layer including an electrically conductive underlayer on the surface of the insulating substrate and a seed layer on a surface of the underlayer, the seed layer having a predetermined pattern corresponding to the wiring pattern and containing metal; forming a diffusion layer in which an element forming the underlayer and an element forming the seed layer are mutually diffused, between the underlayer and the seed layer, by irradiating the seed layer with a laser beam; forming a metal layer on a surface of the seed layer by disposing a solid electrolyte membrane between an anode and the seed layer as a cathode, pressing the solid electrolyte membrane against at least the seed layer, and applying voltage between the anode and the underlayer to reduce metal ions contained in the solid electrolyte membrane; and forming the wiring layer by removing, from the insulating substrate, an exposed portion without the seed layer of the underlayer.

2 . The method for manufacturing the wiring board according to claim 1 , wherein
the element forming the seed layer is a noble metal element, the underlayer of the prepared substrate with seed-layer contains an oxide on a contacting surface where the underlayer contacts the seed layer, and in forming the diffusion layer, a diffusion layer in which oxygen originating from the oxide is diffused is formed as the diffusion layer by irradiating the seed layer with the laser beam.

3 . The method for manufacturing the wiring board according to claim 1 , wherein the seed layer contains metallic nanoparticles.

4 . The method for manufacturing the wiring board according to claim 3 , wherein
in preparing the substrate with seed-layer, ink in which the metallic nanoparticles are dispersed in a dispersion medium is applied onto the underlayer in the predetermined pattern and the applied ink is then dried so as to form the seed layer, and the ink is dried until an amount of the dispersion medium remaining in the seed layer is reduced to 0.1 mass % or less relative to the seed layer.

5 . A wiring board comprising:
an insulating substrate, and a wiring layer disposed on a surface of the insulating substrate and having a predetermined wiring pattern, wherein the wiring layer includes an electrically conductive underlayer disposed on the surface of the insulating substrate, a seed layer disposed on a surface of the underlayer and containing metal, and a metal layer disposed on a surface of the seed layer, and a diffusion layer, in which an element forming the underlayer and an element forming the seed layer are mutually diffused, is formed between the underlayer and the seed layer.

Assignees

• Toyota Motor Co Ltd

Inventors

• Kuroda Keiji
• Kondoh Haruki
• Okamoto Kazuaki
• Mori Rentaro
• Yanagimoto Hiroshi

Classifications

• C25D5/00

  Electroplating characterised by the process; Pretreatment or after-treatment of workpieces · CPC title

• C25D5/54

  Electroplating of non-metallic surfaces (C25D7/12 takes precedence) · CPC title

• C25D5/02 Primary

  Electroplating of selected surface areas · CPC title

• H05K1/02

  Details · CPC title

• H05K3/06

  the conductive material being removed chemically or electrolytically, e.g. by photo-etch process {(semi-additive methods H05K3/108)} · CPC title