Method for detecting resistance of side trace of display substrate and display substrate

Patent metadata

Field	Value
Publication number	US-2021375700-A1
Application number	US-201917255079-A
Country	US
Kind code	A1
Filing date	Nov 29, 2019
Priority date	Nov 29, 2019
Publication date	Dec 2, 2021
Grant date	—

Abstract

The present disclosure provides a method for detecting resistance of a side trace of a display substrate and the display substrate, and belongs to the field of display technology. In the method for detecting resistance of a side trace of a display substrate, the display substrate includes: a base substrate including a first surface and a second surface opposite to each other; a plurality of first pads at intervals on the first surface; and a plurality of second pads at intervals on the second surface; the first pad is electrically connected to a corresponding second pad through a side trace; the method includes forming at least one detection unit; wherein forming the detection unit includes: connecting two first pads through a connection part; and detecting two second pads in the detection unit, and obtaining resistance of the detection unit to obtain the resistance of the side trace.

First claim

1 . A method for detecting resistance of a side trace of a display substrate, wherein the display substrate comprises: a base substrate comprising a first surface and a second surface opposite to each other; a plurality of first pads disposed at intervals on the first surface; and a plurality of second pads disposed at intervals on the second surface; the first pad being electrically connected to a corresponding second pad through a side trace; the method comprising:
forming at least one detection unit, wherein forming the detection unit comprises: connecting any two of the plurality of first pads through a connection part; and detecting two second pads in the detection unit, and obtaining resistance of the detection unit to obtain the resistance of the side trace.

2 . The method of claim 1 , wherein the plurality of first pads comprise: a plurality of first signal pads and a plurality of first redundant pads; the plurality of second pads comprise: a plurality of second signal pads and a plurality of second redundant pads; the plurality of first signal pads and the plurality of second signal pads are arranged in one-to-one correspondence; the plurality of first redundant pads and the plurality of second redundant pads are arranged in one-to-one correspondence; and
the step of forming the detection unit comprises: connecting two of the plurality of first redundant pads through the connection part.

3 . The method of claim 1 , wherein the plurality of first pads comprise: a plurality of first signal pads and a plurality of first redundant pads; the plurality of second pads comprise: a plurality of second signal pads and a plurality of second redundant pads; the plurality of first signal pads and the plurality of second signal pads are arranged in one-to-one correspondence; the plurality of first redundant pads and the plurality of second redundant pads are arranged in one-to-one correspondence; and
the step of forming the detection unit comprises: connecting two of the plurality of first signal pads through the connection part.

4 . The method of claim 3 , wherein after the steps of detecting two second pads in the detection unit, and obtaining resistance of the detection unit to obtain the resistance of the side trace, the method further comprises: cutting off the connection part of each detection unit.

5 . The method of claim 4 , wherein the step of cutting off the connection part of each detection unit comprises: cutting off the connection part in each detection unit with laser.

6 . The method of claim 1 , wherein forming the detection unit comprises: connecting two adjacent first pads through the connection part.

7 . A display substrate, comprising:
a base substrate having a first surface and a second surface opposite to each other; a plurality of first pads arranged at intervals on the first surface; a plurality of second pads arranged at intervals on the second surface and in one-to-one correspondence with the plurality of first pads; a plurality of side traces each configured to connect one of the plurality of first pads to a corresponding second pad; and at least one connection part each configured to connect any two of the plurality of first pads.

8 . The display substrate of claim 7 , wherein the plurality of first pads comprise: a plurality of first signal pads and a plurality of first redundant pads; the plurality of second pads comprise: a plurality of second signal pads and a plurality of second redundant pads; the plurality of first signal pads and the plurality of second signal pads are in one-to-one correspondence; the plurality of first redundant pads and the plurality of second redundant pads are in one-to-one correspondence; and
the connection part connects two first redundant pads.

9 . The display substrate of claim 7 , wherein the plurality of first pads comprise: a plurality of first signal pads and a plurality of first redundant pads; the plurality of second pads comprise: a plurality of second signal pads and a plurality of second redundant pads; the plurality of first signal pads and the plurality of second signal pads are in one-to-one correspondence; the plurality of first redundant pads and the plurality of second redundant pads are in one-to-one correspondence; and
the connection part connects two first signal pads.

10 . The display substrate of claim 7 , wherein the two first pads connected by the connection part are adjacent to each other.

11 . The display substrate of claim 7 , wherein a pixel unit is on the first surface of the base substrate, and the first pad is connected to the pixel unit through a signal introduction line; a plurality of third pads are arranged at intervals on the second surface of the base substrate, and the plurality of second pads are connected to the plurality of third pads in one-to-one correspondence.

12 . The display substrate of claim 7 , wherein a plurality of third pads are arranged at intervals on the first surface of the base substrate, the plurality of first pads are connected to the plurality of third pads in one-to-one correspondence, a pixel unit is on the second surface of the base substrate, and the second pad is connected to the pixel unit through a signal introduction line.

13 . The display substrate of claim 7 , wherein the at least one connection part comprises a plurality of connection parts, and the two first pads connected by different connection parts are different.

Assignees

• Boe Technology Group Co Ltd

Inventors

• Xiao Li
• Zhao Jiao
• Xuan Minghua
• Liu Dongni
• Zheng Haoliang
• Zhang Zhenyu
• Chen Liang
• Chen Hao
• Liu Jing
• Qi Qi

Classifications

• H10P74/273

  Interconnections for measuring or testing, e.g. probe pads · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

• H10P74/232 Primary

  comprising connection or disconnection of parts of a device in response to a measurement · CPC title

• G09G3/006 Primary

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title