Substrate correction device, substrate lamination device, substrate processing system, substrate correction method, substrate processing method, and semiconductor device manufacturing method
US-2024404859-A1 · Dec 5, 2024 · US
Semiconductor substrate, semiconductor element and method for producing semiconductor substrate
US2020168460A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2020168460-A1 |
| Application number | US-201816630087-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jul 9, 2018 |
| Priority date | Jul 10, 2017 |
| Publication date | May 28, 2020 |
| Grant date | — |
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Abstract
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A semiconductor substrate includes a single crystal Ga 2 O 3 -based substrate and a polycrystalline substrate that are bonded to each other. A thickness of the single crystal Ga 2 O 3 -based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal Ga 2 O 3 -based substrate.
First claim
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1 . A semiconductor substrate, comprising a single crystal Ga 2 O 3 -based substrate and a polycrystalline substrate that are bonded to each other, wherein a thickness of the single crystal Ga 2 O 3 -based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal Ga 2 O 3 -based substrate. 2 . The semiconductor substrate according to claim 1 , wherein the fracture toughness value of the polycrystalline substrate is not less than 3 MPa·m 1/2 . 3 . The semiconductor substrate according to claim 2 , wherein the polycrystalline substrate comprises a polycrystalline SiC substrate. 4 . The semiconductor substrate according to claim 1 , wherein a bonding strength between the single crystal Ga 2 O 3 -based substrate and the polycrystalline substrate is not less than 8.3 MPa. 5 . The semiconductor substrate according to claim 1 , wherein a ratio of the thickness of the single crystal Ga 2 O 3 -based substrate to the thickness of the polycrystalline substrate is not more than about 20%. 6 . The semiconductor substrate according to claim 1 , wherein the single crystal Ga 2 O 3 -based substrate has a carrier concentration of not less than 3×10 18 cm −3 . 7 . The semiconductor substrate according to claim 1 , wherein the single crystal Ga 2 O 3 -based substrate comprises a principal plane including a [010] axis. 8 . The semiconductor substrate according to claim 7 , wherein the principal plane comprises a (001) plane. 9 . A semiconductor element, comprising the semiconductor substrate according to claim 1 . 10 . A method for producing a semiconductor substrate, comprising: forming a first amorphous layer by damaging a surface of a single crystal Ga 2 O 3 -based substrate and forming a second amorphous layer by damaging a surface of a polycrystalline SiC substrate; contacting the first amorphous layer with the second amorphous layer; and bonding the single crystal Ga 2 O 3 -based substrate to the polycrystalline SiC substrate by performing heat treatment of not less than 800° C. on the single crystal Ga 2 O 3 -based substrate and the polycrystalline SiC substrate in the state that the first amorphous layer is in contact with the second amorphous layer. 11 . The method for producing a semiconductor substrate according to claim 10 , wherein a temperature of the heat treatment is not more than 1100° C.
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Classifications
Joining of crystals · CPC title
characterised by the composition of the bonding layer, e.g. dopant concentration or stoichiometry · CPC title
leaving a reusable substrate, e.g. epitaxial lift off · CPC title
Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth · CPC title
Amorphous · CPC title
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Frequently asked questions
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- What does patent US2020168460A1 cover?
- A semiconductor substrate includes a single crystal Ga 2 O 3 -based substrate and a polycrystalline substrate that are bonded to each other. A thickness of the single crystal Ga 2 O 3 -based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal Ga 2 O…
- Who is the assignee on this patent?
- Tamura Seisakusho Kk, Sicoxs Corp, Nat Inst Inf & Comm Tech
- What technology area does this patent fall under?
- Primary CPC classification H10P10/128. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu May 28 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).