Spacer stack for magnetic tunnel junctions

Patent metadata

Field	Value
Publication number	US-2020006641-A1
Application number	US-201816129088-A
Country	US
Kind code	A1
Filing date	Sep 12, 2018
Priority date	Jun 27, 2018
Publication date	Jan 2, 2020
Grant date	—

Abstract

The present disclosure describes an exemplary method that forms spacer stacks with metallic compound layers. The method includes forming magnetic tunnel junction (MTJ) structures on an interconnect layer and depositing a first spacer layer over the MTJ structures and the interconnect layer. The method also includes disposing a second spacer layer—which includes a metallic compound—over the first spacer material, the MTJ structures, and the interconnect layer so that the second spacer layer is thinner than the first spacer layer. The method further includes depositing a third spacer layer over the second spacer layer and between the MTJ structures. The third spacer is thicker than the second spacer.

First claim

1 . A method, comprising:
forming magnetic tunnel junction (MTJ) structures on an interconnect layer; depositing a first spacer layer over the MTJ structures and the interconnect layer, wherein the first spacer layer is etched to expose top electrodes of the MTJ structures and the interconnect layer; depositing a second spacer layer over the first spacer layer, the MTJ structures, and the interconnect layer, wherein the second spacer layer is thinner than the first spacer layer and comprises a metallic compound; and etching the second spacer layer to expose the top electrodes of the MTJ structures.

2 . The method of claim 1 , wherein the depositing the second spacer layer comprises:
exposing the first spacer layer, the MTJ structures, and the interconnect layer to an ammonia plasma or a nitrogen plasma; exposing the first spacer layer, the MTJ structures, and the interconnect layer to a trimethylaluminum precursor to form a partially decomposed precursor layer on the first spacer layer, the MTJ structures, and the interconnect layer; and exposing the partially decomposed precursor layer to ammonia gas or to 1-butanol gas to form an aluminum nitride or an aluminum oxide, respectively.

3 . The method of claim 1 , wherein the metallic compound comprises aluminum oxide with an oxygen to aluminum ratio between 1.2 to 2.3 and a dielectric constant between 7 and 9.5.

4 . The method of claim 1 , wherein the metallic compound comprises aluminum nitride with an aluminum to nitrogen ratio between 0.67 to 2.3 and a dielectric constant between 7 and 9.5.

5 . The method of claim 1 , wherein the metallic compound comprises titanium nitride, titanium oxide, or ruthenium oxide.

6 . The method of claim 1 , wherein the first spacer layer comprises silicon nitride, silicon carbon nitride, or combinations thereof.

7 . A structure, comprising:
a substrate with transistors, contact layers, and one or more interconnect layers disposed thereon; one or more magnetic tunnel junction (MTJ) structures over the one or more interconnect layers, wherein bottom electrodes of the one or more MTJ structures are disposed on vias in a top interconnect layer of the one or more interconnect layers; a first spacer on each sidewall surface of the one or more MTJ structures; a metallic compound layer over each sidewall surface of the one or more MTJ structures and over the top interconnect layer, wherein the metallic compound layer fo is a second spacer that is thinner than the first spacer; and a third spacer on the metallic compound layer, wherein the third spacer is thicker than the second spacer and is disposed between the MTJ structures.

8 . The structure of claim 7 , wherein the first spacer, the metallic compound layer, and the third spacer form a spacer stack with a thickness less than 30 nm.

9 . The structure of claim 7 , wherein the metallic compound layer comprises an aluminum-based nitride or an aluminum-based oxide with a thickness between 5 Å and 50 Å.

10 . The structure of claim 7 , wherein the metallic compound layer comprises an aluminum oxide layer with an oxygen to aluminum ratio between 1.2 and 2.3 and an aluminum atomic percentage between 30 and 45.

11 . The structure of claim 7 , wherein the metallic compound layer comprises titanium oxide, titanium nitride, or ruthenium oxide.

12 . The structure of claim 7 , wherein the first spacer has a thickness between 30 Å and 200 Å and comprises silicon nitride, silicon carbon nitride, or combinations thereof.

13 . The structure of claim 7 , wherein the third spacer has a thickness less than 200 Å and comprises silicon nitride, silicon carbon nitride, silicon oxide, carbon doped silicon oxide, silicon oxy-carbon nitride, or combinations thereof.

14 . The structure of claim 7 , further comprising:
an interlayer dielectric surrounding the third spacer; and another interconnect layer over the interlayer dielectric and the one or more MTJ structures, wherein top electrodes of the one or more MTJ structures are in contact with vias in the another interconnect layer.

15 . A structure, comprising:
an interconnect layer over a substrate and comprising lines and vias; magnetic tunnel junction (MTJ) structures disposed over the vias in the interconnect layer, wherein bottom electrodes of the MTJ structures are in contact with vias in the interconnect layer; a first spacer on each sidewall surface of the MTJ structures; and a second spacer over the first spacer and the interconnect layer, wherein the second spacer comprises a metallic compound layer.

16 . The structure of claim 15 , further comprising
a third spacer; and a dielectric layer surrounding the third spacer, wherein a top surface of the dielectric layer is coplanar with a top surface of the third spacer and top surfaces of top electrodes of the MTJ structures.

17 . The structure of claim 16 , wherein a combined thickness of the first, second, and third spacers is less than 30 nm.

18 . The structure of claim 15 , wherein the MTJ structures are separated by a pitch that ranges from 92 nm to 80 nm.

19 . The structure of claim 15 , wherein the metallic compound layer is less than 50 Å thick and comprises aluminum oxide, aluminum nitride, titanium nitride, titanium oxide, or ruthenium oxide.

20 . The structure of claim 15 , wherein an additional interconnect layer, contact layers, and transistors are interposed between the interconnect layer and the substrate.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Liou Joung-Wei
• Lan Chin Kun

Classifications

• H01L43/02

  Electricity · mapped topic

• H01L43/08 Primary

  Electricity · mapped topic

• H01L43/10

  Electricity · mapped topic

• H01L43/12

  Electricity · mapped topic

• H01L27/226

  Electricity · mapped topic