Semiconductor packages and methods of forming same

Patent metadata

Field	Value
Publication number	US-2019148276-A1
Application number	US-201815877123-A
Country	US
Kind code	A1
Filing date	Jan 22, 2018
Priority date	Nov 15, 2017
Publication date	May 16, 2019
Grant date	—

Abstract

In an embodiment, a package includes a first package structure including a first integrated circuit die having an active side and a back-side, the active side including die connectors, a second integrated circuit die adjacent the first integrated circuit die, the second integrated circuit die having an active side and a back-side, the active side including die connectors, a routing die including die connectors bonded to the active sides of the first integrated circuit die and the second integrated circuit die, the routing die electrically coupling the first integrated circuit die to the second integrated circuit die, an encapsulant encapsulating the first integrated circuit die, the second integrated circuit die, and the routing die, and a first redistribution structure on and electrically connected to the die connectors of the first integrated circuit die and the second integrated circuit die.

First claim

What is claimed is:

1 . A package comprising:
a first package structure comprising:
a first integrated circuit die having an active side and a back-side, the active side comprising die connectors;
a second integrated circuit die adjacent the first integrated circuit die, the second integrated circuit die having an active side and a back-side, the active side comprising die connectors;
a routing die bonded to the first integrated circuit die and the second integrated circuit die, the routing die having a front-side and a back-side, the front-side of the routing die comprising die connectors, the die connectors of the routing die being bonded to the active sides of the first integrated circuit die and the second integrated circuit die, the routing die electrically coupling the first integrated circuit die to the second integrated circuit die;
an encapsulant encapsulating the first integrated circuit die, the second integrated circuit die, and the routing die; and
a first redistribution structure on and electrically connected to the die connectors of the first integrated circuit die and the second integrated circuit die, the routing die being between the first redistribution structure and the first integrated circuit die and the second integrated circuit die.

2 . The package of claim 1 , wherein the first package structure further includes:
a first through via adjacent the first integrated circuit die, the first through via extending through the encapsulant.

3 . The package of claim 2 further comprising:
a second package structure bonded to the first through by way of a first set of conductive connectors.

4 . The package of claim 3 , wherein the first package structure further comprises:
a second redistribution structure over the electrically connected to the first through via, the second redistribution structure being between the first integrated circuit die and the second package structure.

5 . The package of claim 3 further comprising
a package substrate bonded to the first redistribution structure of the first package structure by way of a second set of conductive connectors.

6 . The package of claim 1 , wherein the encapsulant extends between the routing die and the first integrated circuit die and the second integrated circuit die, the encapsulant surrounding the die connectors of the routing die.

7 . The package of claim 1 , wherein the encapsulant extends between the routing die and the first redistribution structure.

8 . The package of claim 1 , wherein the routing die comprises:
a substrate; an interconnect structure on the substrate, the interconnect structure comprising metallization patterns in one or more dielectric layers; and die connectors electrically coupled to the metallization patterns of the interconnect structure.

9 . The package of claim 8 , wherein the routing die further comprises a through via extending through the substrate, the through via being physically and electrically connected to the first redistribution structure.

10 . The package of claim 1 , wherein the routing die comprises active or passive devices.

11 . The package of claim 1 , wherein the routing die is substantially free of active and passive devices.

12 . A method comprising:
forming a first package comprising:
forming an electrical connector over a carrier substrate;
attaching a back-side of a first die to the carrier substrate using an adhesive layer, the first die being adjacent the electrical connector;
attaching a back-side of a second die to the carrier substrate using an adhesive layer, the second die being adjacent the first die;
bonding a routing die to active sides of the first and second dies using die connectors on the routing die, the routing die electrically coupling the first and second dies;
encapsulating the first die, the second die, the routing die, and the electrical connector with a molding compound;
forming a first redistribution structure over the first die, the second die, the routing die, the molding compound, and the electrical connector; and
removing the carrier substrate; and
bonding a second package to the first package using a first set of conductive connectors, the second package being proximate the back-sides of the first die and the second die.

13 . The method of claim 12 further comprising:
forming a second redistribution structure over the back-sides of the first die and the second die and over a first end of the electrical connector, the second redistribution structure being electrically connected to the electrical connector, the second package being bonded to the second redistribution structure.

14 . The method of claim 12 , wherein the molding compound extends between the routing die and the first die and the second die, the molding compound surrounding the die connectors of the routing die.

15 . The method of claim 12 , wherein the molding compound extends between the routing die and the first redistribution structure.

16 . The method of claim 12 further comprising:
planarizing the molding compound, die connectors on active sides of the first die and the second die, and the electrical connector to have level surfaces.

17 . The method of claim 12 , wherein the routing die comprises:
a substrate; an interconnect structure on the substrate, the interconnect structure comprising metallization patterns in one or more dielectric layers; a through via extending through the substrate, the through via being physically and electrically connected to the first redistribution structure; and die connectors electrically coupled to the metallization patterns of the interconnect structure.

18 . A method comprising:
forming a first package comprising:
forming an electrical connector over a carrier substrate;
adhering a first die to the carrier substrate, an active side of the first die comprising a first set and a second set of die connectors, the active side being opposite a back-side, the first die being adjacent the electrical connector;
adhering a second die to the carrier substrate, an active side of the second die comprising a third set and a fourth set of die connectors, the active side being opposite a back-side, the second die being adjacent the first die;
bonding a routing die to the first and second dies using the first and third sets of die connectors;
encapsulating the first die, the second die, the routing die, and the electrical connector with a molding compound;
forming a redistribution structure overlying the active side of the first die, the molding compound, and the electrical connector, the redistribution structure being electrically coupled to the second and fourth sets of die connectors and the electrical connector; and
removing the carrier substrate; and
bonding a second package to the first package using a first set of conductive connectors, the second package being proximate a back-side of the routing die.

19 . The method of claim 18 , wherein the second and fourth sets of die connectors of the first and second dies are adjacent the routing die and extend from a front-side of the routing die to the back-side of the routing die.

20 . The method of claim 18 , wherein die connectors of the second and fourth sets of die connectors have a first height, and wherein the routing die has a second height, the first height being greater than the second height.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chen Jie
• Chen Ying-Ju
• Chen Hsien-Wei

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W70/63

  Vias, e.g. via plugs · CPC title

• H10W90/28

  the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W70/099

  Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers · CPC title