Integrated device package comprising silicon bridge in an encapsulation layer

Patent metadata

Field	Value
Publication number	US-2016133571-A1
Application number	US-201414535966-A
Country	US
Kind code	A1
Filing date	Nov 7, 2014
Priority date	Nov 7, 2014
Publication date	May 12, 2016
Grant date	—

Abstract

Some novel features pertain to an integrated device package that includes an encapsulation portion and a redistribution portion. The encapsulation portion includes a first die, a first set of vias coupled to the first die, a second die, a second set of vias coupled to the second die, a bridge, and an encapsulation layer. The bridge is configured to provide an electrical path between the first die and the second die. The bridge is coupled to the first die through the first set of vias. The bridge is further coupled to the second die through the second set of vias. The encapsulation layer at least partially encapsulates the first die, the second die, the bridge, the first set of vias, and the second set of vias. The redistribution portion is coupled to the encapsulation portion. The redistribution portion includes a set of redistribution interconnects, and at least one dielectric layer.

First claim

What is claimed is:

1 . An integrated device package comprising:
an encapsulation portion comprising:
a first die;
a first set of vias coupled to the first die;
a second die;
a second set of vias coupled to the second die;
a bridge configured to provide an electrical path between the first die and the second die, the bridge coupled to the first die through the first set of vias, the bridge further coupled to the second die through the second set of vias;
an encapsulation layer at least partially encapsulating the first die, the second die, the bridge, the first set of vias, and the second set of vias; and
a redistribution portion coupled to the encapsulation portion, the redistribution portion comprising:
a set of redistribution interconnects; and
at least one dielectric layer.

2 . The integrated device package of claim 1 , wherein the bridge comprises a set of bridge interconnects comprising a bridge interconnect density.

3 . The integrated device package of claim 2 , wherein the bridge interconnect density of the set of bridge interconnects comprises a width of about 2 microns (μm) or less, and/or a spacing of about 2 microns (μm) or less.

4 . The integrated device package of claim 2 , wherein the electrical path between the first die and the second die comprises the set of bridge interconnects in the bridge, the first set of vias and the second set of vias.

5 . The integrated device package of claim 2 , wherein the set of bridge interconnects comprises one of at least a trace, a via, and/or a pad.

6 . The integrated device package of claim 1 , further comprising:
a third set of vias coupled to the first die and the set of redistribution interconnects; and a fourth set of vias coupled to the second die and the set of redistribution interconnects.

7 . The integrated device package of claim 6 , wherein the third set of vias and the fourth set of vias comprises a via density that is greater than a bridge interconnect density of the bridge.

8 . The integrated device package of claim 1 , wherein the encapsulation layer includes a photosensitive material.

9 . The integrated device package of claim 1 , wherein the integrated device package is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

10 . An integrated device package comprising:
an encapsulation portion comprising:
a first die;
a first set of vias coupled to the first die;
a second die;
a second set of vias coupled to the second die;
a bridge means configured to provide an electrical path between the first die and the second die, the bridge means coupled to the first die through the first set of vias, the bridge means further coupled to the second die through the second set of vias;
an encapsulation layer at least partially encapsulating the first die, the second die, the bridge means, the first set of vias, and the second set of vias; and
a redistribution portion coupled to the encapsulation portion, the redistribution portion comprising:
a set of redistribution interconnects; and
at least one dielectric layer.

11 . The integrated device package of claim 10 , wherein the bridge means comprises a set of bridge interconnects comprising a bridge interconnect density.

12 . The integrated device package of claim 11 , wherein the bridge interconnect density of the set of bridge interconnects comprises a width of about 2 microns (μm) or less, and/or a spacing of about 2 microns (μm) or less.

13 . The integrated device package of claim 11 , wherein the electrical path between the first die and the second die comprises the set of bridge interconnects in the bridge means, the first set of vias and the second set of vias.

14 . The integrated device package of claim 11 , wherein the set of bridge interconnects comprises one of at least a trace, a via, and/or a pad.

15 . The integrated device package of claim 10 , further comprising:
a third set of vias coupled to the first die and the set of redistribution interconnects; and a fourth set of vias coupled to the second die and the set of redistribution interconnects.

16 . The integrated device package of claim 15 , wherein the third set of vias and the fourth set of vias comprises a via density that is greater than a bridge interconnect density of the bridge means.

17 . The integrated device package of claim 10 , wherein the encapsulation layer includes a photosensitive material.

18 . The integrated device package of claim 10 , wherein the integrated device package is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

19 . A method for fabricating an integrated device package, comprising:
providing an encapsulation portion, wherein providing the encapsulation portion comprises:
providing a first die comprising a first set of vias;
providing a second die comprising a second set of vias;
coupling a bridge to the first die and the second die; the bridge configured to provide an electrical path between the first die and the second die, the bridge coupled to the first die through the first set of vias, the bridge further coupled to the second die through the second set of vias;
forming an encapsulation layer to at least partially encapsulate the first die, the second die, the bridge, the first set of vias, and the second set of vias; and
forming a redistribution portion on the encapsulation portion, wherein forming the redistribution portion comprises:
forming a set of redistribution interconnects; and
forming at least one dielectric layer.

20 . The method of claim 19 , wherein the bridge comprises a set of bridge interconnects comprising a bridge interconnect density.

21 . The method of claim 20 , wherein the bridge interconnect density of the set of bridge interconnects comprises a width of about 2 microns (μm) or less, and/or a spacing of about 2 microns (μm) or less.

22 . The method of claim 20 , wherein the electrical path between the first die and the second die comprises the set of bridge interconnects in the bridge, the first set of vias and the second set of vias.

23 . The method of claim 20 , wherein the set of bridge interconnects comprises one of at least a trace, a via, and/or a pad.

24 . The method of claim 19 , wherein the first die comprises a third set of vias coupled to the set of redistribution interconnects, and the second die comprises a fourth set of vias coupled to the set of redistribution interconnects.

25 . The method of claim 24 , wherein the third set of vias and the fourth set of vias comprises a via density that is greater than a bridge interconnect density of the bridge.

26 . The method of claim 19 , wherein the encapsulation layer includes a photosensitive material.

27 . The method of claim 19 , wherein the integrated device package is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone,

Assignees

• Qualcomm Inc

Inventors

• Lee Jae Sik
• We Hong Bok
• Kim Dong Wook
• Gu Shiqun

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/142

  the encapsulations exposing the passive side of the semiconductor body · CPC title

• H10W74/019

  using temporary auxiliary substrates (H10W74/017 takes precedence) · CPC title

• H10W72/9413

  on encapsulations · CPC title

• H10W72/07207

  Temporary substrates, e.g. removable substrates · CPC title