Method of forming memory capacitor

Patent metadata

Field	Value
Publication number	US-2019081134-A1
Application number	US-201816114217-A
Country	US
Kind code	A1
Filing date	Aug 28, 2018
Priority date	Sep 14, 2017
Publication date	Mar 14, 2019
Grant date	—

Abstract

The present invention relates to a method of forming a memory capacitor. A substrate is provided with a plurality of storage node contacts. A patterned supporting structure is formed on the substrate, following by forming a bottom electrode conformally on surface of plural openings in the patterned supporting structure, thereby contacting the storage node contacts. A sacrificial layer is formed in the opening. A soft etching process is performed to remove the bottom electrode on top and partial sidewall of the patterned supporting structure, wherein the soft etching process includes using a fluoride containing compound, a nitrogen and hydrogen containing compound and an oxygen containing compound. The sacrificial layer is completely removed away. A capacitor dielectric layer and a top electrode are formed on the bottom electrode layer.

First claim

What is claimed is:

1 . A method of forming a memory capacitor, comprising:
providing a substrate, which comprises a plurality of storage node contacts; forming a patterned supporting structure on the substrate, wherein the patterned supporting structure comprises a plurality of openings, each of which corresponding to each of the storage node contacts; forming a bottom electrode layer on the patterned supporting layer, wherein the bottom electrode layer is conformally formed on the patterned supporting layer and sidewalls and bottom surfaces of the openings, and contacting the storage node contacts; forming a sacrificial layer on the bottom electrode layer, wherein the sacrificial layer is filled into the openings; performing a soft etching process for removing the bottom electrode layer on the patterned supporting layer and partials of sidewalls of the openings, wherein said soft etching process comprises using a fluoride containing compound, a nitrogen and hydrogen containing compound and an oxygen containing compound; completely removing the sacrificial layer; removing partials of the patterned supporting layer; forming a capacitor dielectric layer on the bottom electrode layer; and forming a top electrode layer on the capacitor dielectric layer.

2 . The method of forming a memory capacitor according to claim 1 , wherein the fluoride containing compound comprises fluorine (F 2 ), xenon difluoride (XeF 2 ) or nitrogen trifluoride (NF 3 ).

3 . The method of forming a memory capacitor according to claim 1 , wherein the nitrogen and hydrogen containing compound comprises ammonia (NH 3 ), hydrazine (N 2 H 4 ) or diazene (N 2 H 2 ).

4 . The method of forming a memory capacitor according to claim 1 , wherein the oxygen containing compound comprises oxygen (O 2 ), ozone (O 3 ) or hydrogen oxide (H 2 O).

5 . The method of forming a memory capacitor according to claim 1 , wherein before the soft etching process, a bottom surface of the sacrificial layer is lower than a top surface of the patterned supporting layer.

6 . A method of forming a memory capacitor, comprising:
providing a substrate, which comprises a plurality of storage node contacts; forming a patterned supporting structure on the substrate, wherein the patterned supporting structure comprises a plurality of openings, each of which corresponding to each of the storage node contacts; forming a bottom electrode layer on the patterned supporting layer, wherein the bottom electrode is conformally formed on the patterned supporting layer and sidewalls and bottom surfaces of the openings, and contacting the storage node contacts; forming a sacrificial layer on the bottom electrode layer, wherein the sacrificial layer is filled into the openings; performing a soft etching process for removing the bottom electrode on the patterned supporting layer and partials of sidewalls of the openings, thereby making atop surface of the bottom electrode layer lower than a top surface of the sacrificial layer and forming a plurality of recesses between the patterned support layer, the sacrificial layer and the bottom electrode; completely removing the sacrificial layer; removing partials of the patterned supporting layer; forming a capacitor dielectric layer on the bottom electrode layer; and forming a top electrode on the capacitor dielectric layer.

7 . The method of forming a memory capacitor according to claim 6 , wherein before the soft etching process, a bottom surface of the sacrificial layer is lower than a top surface of the patterned supporting layer.

8 . The method of forming a memory capacitor according to claim 6 , wherein the patterned supporting structure from bottom to top sequentially comprises a first supporting layer, a first filling layer, a second filling layer, a second supporting layer, a third filling layer and a third supporting layer, wherein after the soft etching process, the top surface of the bottom electrode layer is higher than a boundary between third supporting layer and the third filling layer.

9 . The method of forming a memory capacitor according to claim 8 , wherein the step of removing the patterned supporting structure is to remove the first filling layer, the second filling layer and the third filling layer.

10 . The method of forming a memory capacitor according to claim 6 , wherein the top surface of the bottom electrode layer is substantially parallel to a horizontal direction.

Assignees

• United Microelectronics Corp
• Fujian Jinhua Integrated Circuit Co Ltd

Inventors

• Chang Feng-Yi
• Lee Fu-Che
• Chen Chieh-Te

Classifications

• H10P50/667

  by liquid etching only · CPC title

• H10P50/266

  by vapour etching only · CPC title

• H10P50/264

  by chemical means · CPC title

• H10P50/71

  using masks for conductive or resistive materials · CPC title

• H01L28/92 Primary

  Electricity · mapped topic