Technique to deposit sidewall passivation for high aspect ratio cylinder etch
US-2016343580-A1 · Nov 24, 2016 · US
US2019019688A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2019019688-A1 |
| Application number | US-201816036617-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jul 16, 2018 |
| Priority date | Jul 17, 2017 |
| Publication date | Jan 17, 2019 |
| Grant date | — |
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Methods of etching a semiconductor substrate may include applying an etchant to the semiconductor substrate. The semiconductor substrate may include an exposed region of an oxygen-containing material and an exposed region of a nitrogen-containing material. The methods may include heating the semiconductor substrate from a first temperature to a second temperature. The methods may include maintaining the semiconductor substrate at the second temperature for a period of time sufficient to perform an etch of the nitrogen-containing material relative to the oxygen-containing material. The methods may also include quenching the etch subsequent the period of time.
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What is claimed is: 1 . A method of etching a semiconductor substrate, the method comprising: applying an etchant to the semiconductor substrate, wherein the semiconductor substrate includes an exposed region of an oxygen-containing material and an exposed region of a nitrogen-containing material; heating the semiconductor substrate from a first temperature to a second temperature; maintaining the semiconductor substrate at the second temperature for a period of time sufficient to perform an etch of the nitrogen-containing material relative to the oxygen-containing material; and quenching the etch subsequent the period of time. 2 . The method of etching a semiconductor substrate of claim 1 , wherein the first temperature is below about 100° C. 3 . The method of etching a semiconductor substrate of claim 1 , wherein the second temperature is above about 100° C. 4 . The method of etching a semiconductor substrate of claim 1 , wherein the etchant comprises phosphoric acid at a concentration of at least about 60% by volume. 5 . The method of etching a semiconductor substrate of claim 4 , wherein the etchant further comprises tetraethyl orthosilicate. 6 . The method of etching a semiconductor substrate of claim 1 , wherein the period of time is less than or about 60 seconds. 7 . The method of etching a semiconductor substrate of claim 1 , wherein the semiconductor substrate is heated from the first temperature to the second temperature in less than or about 10 seconds. 8 . The method of etching a semiconductor substrate of claim 1 , wherein the quenching comprises contacting the semiconductor substrate with a volume of deionized water. 9 . The method of etching a semiconductor substrate of claim 8 , wherein the quenching reduces the etch rate by at least a factor of 10 in less than or about 10 seconds. 10 . A method of etching a semiconductor substrate, the method comprising: applying an etchant to the semiconductor substrate, wherein the semiconductor substrate includes alternating layers of an oxide material and a nitride material; heating the semiconductor substrate from a first temperature to a second temperature greater than or about 100° C. in less than or about 30 seconds; maintaining the semiconductor substrate at the second temperature for a period of time; etching the nitride material relative to the oxide material at a selectivity greater than or about 10:1; and diluting the etchant to terminate the etching. 11 . The method of etching a semiconductor substrate of claim 10 , wherein the semiconductor substrate is heated to a temperature of above or about 150° C. 12 . The method of etching a semiconductor substrate of claim 10 , wherein less than or about 200 mL of etchant is applied to the semiconductor substrate. 13 . The method of etching a semiconductor substrate of claim 10 , further comprising rotating the semiconductor substrate during the heating. 14 . The method of etching a semiconductor substrate of claim 10 , wherein a rate of etching the nitride material is greater than or about 100 Å per minute. 15 . The method of etching a semiconductor substrate of claim 10 , wherein the nitride material is etched uniformly across the semiconductor substrate within a tolerance of less than or about 30% of an amount of the nitride material etched. 16 . The method of etching a semiconductor substrate of claim 10 , wherein diluting the etchant reduces a temperature of the etchant below about 100° C. in less than or about 10 seconds. 17 . The method of etching a semiconductor substrate of claim 10 , wherein the etchant comprises phosphoric acid at a concentration of at least about 75% by volume. 18 . The method of etching a semiconductor substrate of claim 10 , wherein the etchant further comprises at least one of soluble silicate or fluorine-containing material. 19 . The method of etching a semiconductor substrate of claim 10 , wherein additional etchant is not applied during the etching process. 20 . The method of etching a semiconductor substrate of claim 10 , wherein the amount of nitride material etched is less than or about 100 Å.
the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title
the material being a silicon oxide, e.g. SiO2 · CPC title
Laminate layers, e.g. stacks of alternating high-k metal oxides (adhesion layers or buffer layers H10P14/6508, H10P14/6548) · CPC title
Thermal treatments, e.g. annealing or sintering · CPC title
characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating carrousel · CPC title
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