Conformal 3d non-planar multi-layer circuitry

US2018192513A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018192513-A1
Application numberUS-201815876552-A
CountryUS
Kind codeA1
Filing dateJan 22, 2018
Priority dateAug 9, 2012
Publication dateJul 5, 2018
Grant date

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method for making conformal non-planar multi-layer circuitry is described. The method can include providing a substrate having a non-planar surface and depositing a first conformal dielectric layer on the substrate, the first conformal dielectric layer conforming to the non-planar surface of the substrate and having a non-planar surface. The method can also include applying a first conformal circuitry layer on the first conformal dielectric layer. The method can include depositing a second conformal dielectric layer on the first conformal circuitry layer, the second conformal dielectric layer conforming to a non-planar surface of the first conformal circuitry layer, and applying a second conformal circuitry layer on the second conformal dielectric layer. Successive layers can be sequentially deposited. Microvias may provide electrical connections between circuit layers.

First claim

Opening claim text (preview).

1 - 20 . (canceled) 21 . A conformal non-planar multi-layer circuit, comprising: a substrate having a first non-planar surface; a conformal circuitry layer over the substrate, the conformal circuitry layer conforming to the first non-planar surface of the substrate, and the conformal circuitry layer having a second non-planar surface; and a copper circuitry layer over the conformal circuitry layer, the copper circuitry layer conforming to the second non-planar surface of the conformal circuitry layer, and the copper circuitry layer having a third non-planar surface. 22 . The conformal non-planar multi-layer circuit of claim 21 , further comprising: a conformal dielectric layer over the copper circuitry layer, the conformal dielectric layer conforming to the third non-planar surface of the copper circuitry layer, and the conformal dielectric layer having a fourth non-planar surface. 23 . The conformal non-planar multi-layer circuit of claim 22 , wherein the conformal dielectric layer has a thickness of about 2 mils. 24 . The conformal non-planar multi-layer circuit of claim 21 , further comprising: a conformal dielectric layer over the substrate, the conformal dielectric layer conforming to the first non-planar surface of the substrate and the conformal dielectric layer having a fourth non-planar surface. 25 . The conformal non-planar multi-layer circuit of claim 24 , wherein the conformal dielectric layer includes at least one micro via exposing the conformal circuitry layer, and the copper circuitry layer contacts the conformal circuitry layer through the at least one micro via. 26 . The conformal non-planar multi-layer circuit of claim 21 , wherein the conformal circuitry layer includes a chromium-copper alloy layer. 27 . The conformal non-planar multi-layer circuit of claim 26 , wherein the chromium-copper alloy layer has a thickness of about 1 micron. 28 . The conformal non-planar multi-layer circuit of claim 21 , wherein the copper circuitry layer includes a chromium-copper alloy layer. 29 . The conformal non-planar multi-layer circuit of claim 21 , wherein at least one of the conformal circuitry layer and the copper circuitry layer has a thickness of about 12.7 microns. 30 . A method of forming a multi-layer circuit, comprising: providing a substrate having a first non-planar surface; forming a conformal circuitry layer over the substrate, the conformal circuitry layer conforming to the first non-planar surface of the substrate, and the conformal circuitry layer having a second non-planar surface; and forming a copper circuitry layer over the conformal circuitry layer, the copper circuitry layer conforming to the second non-planar surface of the conformal circuitry layer, and the copper circuitry layer having a third non-planar surface. 31 . The method of claim 30 , further comprising: depositing a conformal dielectric layer over the copper circuitry layer, the conformal dielectric layer conforming to the third non-planar surface of the copper circuitry layer, and the conformal dielectric layer having a fourth non-planar surface. 32 . The method of claim 31 , wherein the depositing the conformal dielectric layer includes performing a vapor deposition process until the conformal dielectric layer has a thickness of about 2 mils. 33 . The method of claim 30 , further comprising: depositing a conformal dielectric layer over the substrate, the conformal dielectric layer conforming to the first non-planar surface of the substrate and the conformal dielectric layer having a fourth non-planar surface. 34 . The method of claim 33 , further comprising: drilling at least one micro via into the conformal dielectric layer, the at least one micro via exposing the conformal circuitry layer, wherein the copper circuitry layer contacts the conformal circuitry layer through the at least one micro via. 35 . The method of claim 30 , wherein the forming of the conformal circuitry layer includes sputtering or electroplating a chromium-copper alloy layer over the substrate. 36 . The method of claim 35 , wherein the chromium-copper alloy layer has a thickness of about 1 micron. 37 . The method of claim 30 , wherein the forming of the copper circuitry layer includes sputtering or electroplating a chromium-copper alloy layer over the conformal circuitry layer. 38 . The method of claim 30 , wherein at least one of the conformal circuitry layer and the copper circuitry layer has a thickness of about 12.7 microns.

Assignees

Inventors

Classifications

  • H05K3/4644Primary

    by building the multilayer layer by layer, i.e. build-up multilayer circuits (making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602) · CPC title

  • the metal substrate being covered by an inorganic insulating layer · CPC title

  • Rigid curved substrate · CPC title

  • H05K1/0298Primary

    Multilayer circuits · CPC title

  • Details of three-dimensional rigid printed circuit boards (H05K1/119 takes precedence; shaping of the substrate H05K3/0014) · CPC title

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What does patent US2018192513A1 cover?
A method for making conformal non-planar multi-layer circuitry is described. The method can include providing a substrate having a non-planar surface and depositing a first conformal dielectric layer on the substrate, the first conformal dielectric layer conforming to the non-planar surface of the substrate and having a non-planar surface. The method can also include applying a first conformal …
Who is the assignee on this patent?
Lockheed Corp
What technology area does this patent fall under?
Primary CPC classification H05K3/4644. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 05 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).