Electroplating systems and methods for high sheet resistance substrates
US-9222195-B2 · Dec 29, 2015 · US
US2018166409A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2018166409-A1 |
| Application number | US-201815877186-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jan 22, 2018 |
| Priority date | Nov 16, 2015 |
| Publication date | Jun 14, 2018 |
| Grant date | — |
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External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.
Opening claim text (preview).
What is claimed is: 1 . A semiconductor device comprising: a conductive pillar located over a conductive member over a substrate; a reflowable material located over the conductive pillar, wherein the reflowable material further comprises: a first portion located over a first surface of the conductive pillar, wherein the first surface faces away from the conductive member, wherein the first portion has a first concentration of a first component; and a second portion located adjacent to but not fully covering a second surface of the conductive pillar, wherein the second surface extends from the first surface towards the substrate, wherein the second portion has a second concentration of the first component greater than the first concentration. 2 . The semiconductor device of claim 1 , wherein the first component is silver. 3 . The semiconductor device of claim 1 , wherein the conductive pillar has a first width at a first point covered by the reflowable material and a second width less than the first width at a second point not covered by the reflowable material, wherein the first width is parallel to a major surface of the substrate. 4 . The semiconductor device of claim 3 , wherein the second width is between about 38 μm and about 68 μm. 5 . The semiconductor device of claim 4 , wherein the first width is between about 40 μm and about 70 μm. 6 . The semiconductor device of claim 1 , wherein the first concentration of the first component is between about 1.4% and about 2.2%. 7 . The semiconductor device of claim 6 , wherein the first component is silver, wherein the first portion has a third concentration of tin of between about 97.8% and about 98.6%. 8 . A semiconductor device comprising: a continuous reflowable material over a substrate, the continuous reflowable material comprising: a first portion with a first concentration of a first component; and a second portion with a second concentration of the first component different from the first concentration of the first component; a conductive pillar extending between the first portion and the second portion, wherein a sidewall of the conductive pillar has a first part covered by the first portion and a second part uncovered by the continuous reflowable material; and an underbump metallization in electrical connection with the conductive pillar. 9 . The semiconductor device of claim 8 , wherein the conductive pillar has a first width adjacent to the first part and a second width adjacent to the second part, the first width being larger than the second width. 10 . The semiconductor device of claim 8 , wherein the first portion has a width that is equal to or less than about 1 μm. 11 . The semiconductor device of claim 8 , wherein the continuous reflowable material has a height over the conductive pillar, and wherein the first portion has a width that is between about 1% and about 5% of the height. 12 . The semiconductor device of claim 8 , wherein the first portion comprises an intermetallic compound. 13 . The semiconductor device of claim 12 , wherein the intermetallic compound has a thickness that is equal to or greater than about half of a width of the first portion. 14 . The semiconductor device of claim 8 , further comprising a barrier layer located between the conductive pillar and the continuous reflowable material. 15 . A semiconductor device comprising: a conductive pillar over an underbump metallization over a substrate; a first reflowable material in physical contact with a first surface of the conductive pillar facing away from the substrate, the first reflowable material having a first concentration of a first component; and a second reflowable material in physical contact with a second surface of the conductive pillar, the second surface being perpendicular to the first surface, the second reflowable material having a second concentration of the first component, wherein a portion of the second surface remains free of the first reflowable material and the second reflowable material. 16 . The semiconductor device of claim 15 , wherein the conductive pillar comprises aluminum. 17 . The semiconductor device of claim 15 , further comprising a barrier layer between the conductive pillar and the second reflowable material. 18 . The semiconductor device of claim 17 , wherein a sidewall comprising the second surface and a surface of the barrier layer has a first height of between about 40 μm and about 70 μm. 19 . The semiconductor device of claim 18 , wherein the second reflowable material has a second height that is between about 5% and about 10% of the first height. 20 . The semiconductor device of claim 17 , wherein the barrier layer comprises nickel.
comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title
relative to the surface, e.g. recessed, protruding · CPC title
Bond pads having multiple stacked layers · CPC title
Bond pads specially adapted therefor · CPC title
of bond pads · CPC title
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