Interconnect structures and methods of formation
US-2016240483-A1 · Aug 18, 2016 · US
US2018166285A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2018166285-A1 |
| Application number | US-201715730934-A |
| Country | US |
| Kind code | A1 |
| Filing date | Oct 12, 2017 |
| Priority date | Dec 14, 2016 |
| Publication date | Jun 14, 2018 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber. The method also includes introducing a plasma-forming gas into the PVD chamber, and the plasma-forming gas contains an oxygen-containing gas. The method further includes applying a radio frequency (RF) power to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. In addition, the method includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.
Opening claim text (preview).
What is claimed is: 1 . A method for forming a semiconductor device structure, comprising: disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber; introducing a plasma-forming gas into the PVD chamber, wherein the plasma-forming gas contains an oxygen-containing gas; applying a radio frequency (RF) power to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma; and directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate. 2 . The method for forming a semiconductor device structure as claimed in claim 1 , further comprising applying a direct current (DC) power to the metal target, wherein the metal target is an aluminum target, and the etch stop layer contains aluminum oxide. 3 . The method for forming a semiconductor device structure as claimed in claim 2 , wherein the aluminum target is negatively biased, and a bias voltage applied to the semiconductor substrate is in a range from above 0 V to about 20V. 4 . The method for forming a semiconductor device structure as claimed in claim 2 , wherein the RF power is coupled in series with the DC power. 5 . The method for forming a semiconductor device structure as claimed in claim 2 , wherein a power ratio of the DC power to the RF power is in a range from about 0.25 to about 4.5. 6 . The method for forming a semiconductor device structure as claimed in claim 1 , further comprising applying a pulse direct current (DC) power to the metal target. 7 . The method for forming a semiconductor device structure as claimed in claim 1 , wherein the plasma-forming gas contains an inert gas, the oxygen-containing gas is oxygen gas, and the inert gas is argon gas. 8 . The method for forming a semiconductor device structure as claimed in claim 7 , wherein the oxygen-containing gas is oxygen gas, and the inert gas is argon gas. 9 . The method for forming a semiconductor device structure as claimed in claim 1 , further comprising exciting the plasma-forming gas using a plasma ionizer. 10 . The method for forming a semiconductor device structure as claimed in claim 1 , further comprising: forming a recess in the material layer to expose the etch stop layer; and removing the etch stop layer exposed by the recess; and forming a conductive structure in the recess. 11 . A method for forming a semiconductor device structure, comprising: forming an etch stop layer over a semiconductor substrate in a physical vapor deposition (PVD) chamber, wherein a radio frequency (RF) power is applied to an element in the PVD chamber to form the etch stop layer, and the etch stop layer contains aluminum oxide; forming a dielectric layer over the etch stop layer, wherein the dielectric layer has a smaller dielectric constant than that of silicon dioxide; and forming a recess in the dielectric layer using an etching process, wherein the recess exposes the etch stop layer. 12 . The method for forming a semiconductor device structure as claimed in claim 11 , further comprising applying a direct current (DC) power to a metal target positioned in the PVD chamber, wherein a DC voltage applied to the metal target is in a range from about 110 volts to about 300 volts, and the DC power is provided in a range from about 0.1 kW to about 3 kW. 13 . The method for forming a semiconductor device structure as claimed in claim 11 , further comprising applying a pulse direct current (DC) power to a metal target positioned in the PVD chamber. 14 . The method for forming a semiconductor device structure as claimed in claim 11 , wherein the element to which the RF power is applied is a metal target positioned in the PVD chamber. 15 . The method for forming a semiconductor device structure as claimed in claim 11 , wherein the RF power is provided in a range from about 0.1 kW to about 4.5 kW, and a frequency of the provided RF power is in a range from about 13 MHz to about 55 MHz. 16 . A method for forming a semiconductor device structure, comprising: disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber; introducing a plasma-forming gas into the PVD chamber, wherein the plasma-forming gas contains oxygen gas and an inert gas; applying a radio frequency (RF) power to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma; directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate, wherein the etch stop layer is made of metal oxide; and forming a dielectric layer over the etch stop layer. 17 . The method for forming a semiconductor device structure as claimed in claim 16 , wherein the plasma-forming gas comprises oxygen gas and argon gas, and a volumetric concentration ratio of oxygen gas to argon gas is in a range from about 3% to about 80%. 18 . The method for forming a semiconductor device structure as claimed in claim 16 , further comprising applying a direct current (DC) power to the metal target. 19 . The method for forming a semiconductor device structure as claimed in claim 16 , further comprising exciting the plasma-forming gas using a plasma ionizer and applying the radio frequency (RF) power to the metal target to excite the plasma-forming gas at the same time. 20 . The method for forming a semiconductor device structure as claimed in claim 19 , wherein the metal target and the plasma ionizer are respectively positioned on a first sidewall and a second sidewall of the PVD chamber, and the first sidewall and the second sidewall are substantially perpendicular to each other.
of Group IV materials · CPC title
the material containing aluminium, e.g. Al2O3 · CPC title
using physical ablation of a target, e.g. physical vapour deposition or pulsed laser deposition · CPC title
by forming openings in the dielectric parts · CPC title
on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence) · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.