Circuit board with via capacitor structure and manufacturing method for the same

Patent metadata

Field	Value
Publication number	US-2017367183-A1
Application number	US-201715404213-A
Country	US
Kind code	A1
Filing date	Jan 12, 2017
Priority date	Jun 21, 2016
Publication date	Dec 21, 2017
Grant date	—

Abstract

A circuit board with via capacitor structure is introduced herein, including a base, a deposition layer, disposed on the base, having at least a via in the deposition layer, at least a thin film capacitor, each thin film capacitor disposed in each via, each thin film capacitor having a body, a second terminal, and a first terminal, the second terminal and the first terminal located on two opposite sides of the body; at least a first electrode, each first electrode electrically connected to the first terminal of each thin film capacitor; and at least a second electrode, each second electrode electrically connected to the second terminal of each thin film capacitor.

First claim

What is claimed is:

1 . A circuit board having a via capacitor structure, comprising:
a base; a deposition layer disposed on the base, having at least one via in the deposition layer; at least one thin film capacitor, each of the at least one thin film capacitors disposed in each of the at least one vias, each of the at least one thin film capacitors having a body, a second terminal, and a first terminal, wherein the second terminal and the first terminal are located on two opposite sides of the body; at least one first electrode, each of the at least one first electrodes electrically connected to the first terminal of each of the at least one thin film capacitors; and at least one second electrode, each of the at least one second electrodes electrically connected to the second terminal of each of the at least one thin film capacitors; wherein a signal is sent from the first electrode to the second electrode via the body of the at least one thin film capacitor in order to allow a collinear route of the first electrode, the body, and the second electrode to transmit the signal.

2 . The circuit board having a via capacitor structure of claim 1 , wherein the circuit board is manufactured from a core substrate process.

3 . The circuit board having a via capacitor structure of claim 1 , wherein the circuit board is manufactured from a build-up process.

4 . The circuit board having a via capacitor structure of claim 1 , wherein the second electrode is a power source electrode, and the first electrode is a ground electrode.

5 . The circuit board having a via capacitor structure of claim 1 , wherein a surface of the first terminal completely and electrically contacts a surface of each of the at least one first electrodes, and a surface of the second terminal completely and electrically contacts a surface of each of the at least one second electrodes.

6 . The circuit board having a via capacitor structure of claim 1 , wherein the first electrode, the body, and the second electrode form an alignment state along the collinear route.

7 . The circuit board having a via capacitor structure of claim 1 , wherein a method of forming the at least one via is selected from a group consisting of machine drill, laser, plasma, and lithography processes.

8 . The circuit board having a via capacitor structure of claim 1 , wherein a method of forming the at least one thin film capacitor is selected from a group consisting of sputtering, evaporation, atom layer deposit, printing and dispensing.

9 . A manufacturing method of a circuit board having a via capacitor structure, comprising the following steps:
disposing at least one first electrode on a substrate of the circuit board; covering a deposition layer on the first electrode; manufacturing at least one via in the deposition layer; disposing at least one thin film capacitor in at least one via, each of the at least one thin film capacitors disposed in each of the at least one vias, each of the at least one thin film capacitors having a body, a second terminal, and a first terminal, wherein the second terminal and the first terminal are located on two opposite sides of the body, each of the at least one first electrodes is electrically connected to the first terminal of each of the at least one thin film capacitor; and coating at least one second electrode on the at least one thin film capacitor, each of the at least one second electrodes electrically connected to the second terminal of each of the at least one thin film capacitors.

10 . The manufacturing method of claim 9 , wherein the circuit board is manufactured from a core substrate process.

11 . The manufacturing method of claim 9 , wherein the circuit board is manufactured from a build-up process.

12 . The manufacturing method of claim 9 , wherein a method of forming the at least one via is selected from a group consisting of machine drill, laser, plasma, and lithography processes.

13 . The manufacturing method of claim 9 , wherein a method of forming the at least one thin film capacitor is selected from a group consisting of sputtering, evaporation or atom layer deposit, printing and dispensing.

Assignees

• Chunghwa Prec Test Tech Co Ltd

Inventors

• Li Wen Tsung
• Hsieh Kai Chieh
• WENG I Hsing

Classifications

• H05K1/115 Primary

  Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

• H05K3/1241

  by ink-jet printing or drawing by dispensing · CPC title

• H05K1/162 Primary

  incorporating printed capacitors · CPC title

• H05K3/16

  by cathodic sputtering · CPC title

• H05K3/146

  By vapour deposition · CPC title