Co or ni and cu integration for small and large features in integrated circuits

US2017200642A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017200642-A1
Application numberUS-201614991712-A
CountryUS
Kind codeA1
Filing dateJan 8, 2016
Priority dateJan 8, 2016
Publication dateJul 13, 2017
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In one embodiment of the present disclosure, a method for depositing metal in a feature on a workpiece is provided. The method includes electrochemically depositing a second metal layer on a first metal layer on a workpiece having at least two features of two different sizes in a dielectric layer, wherein the second metal layer is a copper layer and wherein the first metal layer includes a metal selected from the group consisting of cobalt and nickel, wherein the first metal layer completely fills the smallest feature but does not completely fill the largest feature.

First claim

Opening claim text (preview).

1 . A method for depositing metal in a feature on a workpiece, the method comprising: electrochemically depositing a second metal layer on a first metal layer on the workpiece having at least two features of two different sizes in a dielectric layer, wherein the second metal layer is a copper layer and wherein the first metal layer includes a metal selected from a group consisting of cobalt and nickel, wherein the first metal layer completely fills the smallest feature but does not completely fill the largest feature. 2 . The method of claim 1 , wherein a first feature has a critical dimension of less than or equal to 17 nm. 3 . The method of claim 1 , wherein a second feature has a critical dimension of greater than 20 nm. 4 . The method of claim 1 , further comprising heat treating the workpiece after deposition of the second metal layer. 5 . The method of claim 4 , wherein a temperature for heat treating the workpiece is in a temperature range of 150 degrees C. to 400 degrees C. 6 . The method of claim 4 , wherein heat treating the workpiece anneals the first and second metal layers. 7 . The method of claim 4 , wherein heat treating the workpiece reflows the second metal layer to at least partially fill the largest feature. 8 . The method of claim 4 , further comprising plasma treating the first metal layer using hydrogen plasma or hydrogen radicals (H*) prior to electrochemically depositing the second metal layer. 9 . The method of claim 1 , further comprising heat treating the first metal layer before depositing the second metal layer. 10 . The method of claim 9 , wherein heat treating the first metal layer is in a temperature range of 200 degrees C. to 400 degrees C. 11 . The method of claim 1 , wherein the second metal layer is a conformal or superconformal layer. 12 . The method of claim 1 , wherein the second metal layer includes an overburden. 13 . The method of claim 1 , wherein the second metal layer at least partially fills the largest feature without depositing an overburden on the workpiece. 14 . The method of claim 1 , further comprising electrochemically depositing a third metal layer on the second metal layer. 15 . The method of claim 14 , wherein the third metal layer is an overburden, a cap, a fill layer, a conformal conductive layer, or a superconformal conductive layer. 16 - 17 . (canceled) 18 . The method of claim 1 , wherein the first metal layer is a first seed layer. 19 . (canceled) 20 . The method of claim 18 , further comprising depositing a second seed layer on the first seed layer prior to deposition of the second metal layer. 21 . The method of claim 20 , wherein the second seed layer is different in metal composition from the first seed layer. 22 . The method of claim 20 , wherein the second seed layer is a copper seed layer. 23 - 24 . (canceled) 25 . The method of claim 1 , wherein the second metal layer is deposited over an entire surface of the first metal layer. 26 - 27 . (canceled) 28 . The method of claim 1 , wherein the second metal layer is a bottom-up fill layer.

Assignees

Inventors

Classifications

  • Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title

  • based on metals, e.g. alloys, metal silicides (H10W20/4484 takes precedence) · CPC title

  • by thermal treatment thereof · CPC title

  • by irradiating with ultraviolet or particle radiation · CPC title

  • H10W20/425Primary

    Barrier, adhesion or liner layers · CPC title

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Frequently asked questions

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What does patent US2017200642A1 cover?
In one embodiment of the present disclosure, a method for depositing metal in a feature on a workpiece is provided. The method includes electrochemically depositing a second metal layer on a first metal layer on a workpiece having at least two features of two different sizes in a dielectric layer, wherein the second metal layer is a copper layer and wherein the first metal layer includes a meta…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10W20/425. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 13 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).