Thin film transistor substrate and display panel having the same
US-2016322602-A1 · Nov 3, 2016 · US
US2017084635A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2017084635-A1 |
| Application number | US-201615190919-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 23, 2016 |
| Priority date | Sep 17, 2015 |
| Publication date | Mar 23, 2017 |
| Grant date | — |
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A transparent display device includes a base substrate having a pixel area and a transmission area, a barrier layer disposed on the base substrate, a pixel circuit disposed in the pixel area, a display structure disposed on the pixel circuit, a transmitting structure disposed in the transmission area, an adhesive layer disposed between the base substrate and the barrier layer, and between the base substrate and the transmitting structure, and a transmitting window defined in the transmission area where the transmitting structure may include a composition including silicon oxynitride, the adhesive layer may include aluminum oxide, and the transmitting window may expose a surface of the transmitting structure.
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What is claimed is: 1 . A transparent display device comprising: a base substrate including a pixel area and a transmission area; a barrier layer disposed on the base substrate; a pixel circuit disposed on the base substrate in the pixel area; a display structure disposed on the pixel circuit; a transmitting structure disposed on the base substrate in the transmission area, the transmitting structure including a composition including silicon oxynitride; an adhesive layer disposed between the base substrate and the barrier layer, and between the base substrate and the transmitting structure, the adhesive layer including aluminum oxide; and a transmitting window exposing the transmitting structure in the transmission area. 2 . The transparent display device of claim 1 , wherein a refractive index of the adhesive layer is in a range of about 1.6 to about 1.8. 3 . The transparent display device of claim 1 , wherein a thickness of the adhesive layer is in a range of about 5 nanometers to about 30 nanometers. 4 . The transparent display device of claim 1 , wherein the adhesive layer has a compressive stress therein. 5 . The transparent display device of claim 1 , wherein the pixel circuit includes an active pattern, a gate electrode, a source electrode and a drain electrode, and wherein the transparent display device further comprises: a gate insulation layer disposed on the barrier layer to cover the active pattern; an insulating interlayer which is disposed on the gate insulation layer and covers the gate electrode; and a via insulation layer which is disposed on the insulating interlayer, covers the source electrode and the drain electrode, the source electrode and the drain electrode extending through the insulating interlayer and the gate insulation layer and contacting the active pattern. 6 . The transparent display device of claim 5 , wherein each of the barrier layer, the gate insulation layer and the insulating interlayer includes silicon oxynitride. 7 . The transparent display device of claim 6 , wherein each of the barrier layer, the gate insulation layer and the insulating interlayer extends from the pixel area to the transmission area, and the transmitting structure includes portions of the barrier layer, the gate insulation layer and the insulating interlayer extended to the transmission area. 8 . The transparent display device of claim 7 , wherein layers of the transmitting structure are integrally combined with one another and together have a single-layered structure. 9 . The transparent display device of claim 5 , further comprising a buffer layer disposed between the barrier layer and the gate insulation layer. 10 . The transparent display device of claim 9 , wherein each of the barrier layer, the buffer layer, the gate insulation layer and the insulating interlayer includes silicon oxynitride. 11 . The transparent display device of claim 10 , wherein each of the barrier layer, the buffer layer, the gate insulation layer and the insulating interlayer extends from the pixel area to the transmission area, and the transmitting structure includes portions of the barrier layer, the buffer layer, the gate insulation layer and the insulating interlayer extended to the transmission area. 12 . The transparent display device of claim 11 , wherein layers of the transmitting structure are integrally combined with one another and together have a single-layered structure. 13 . The transparent display device of claim 5 , wherein the via insulation layer is selectively disposed in the pixel area and does not extend to the transmission area. 14 . The transparent display device of claim 5 , wherein the display structure includes: a pixel electrode disposed on the via insulation layer, the pixel electrode extending through the via insulation layer and contacting the drain electrode; a display layer disposed on the pixel electrode; and an opposing electrode disposed on the display layer and facing the pixel electrode, wherein the transparent display device further comprises a pixel defining layer partially covering the pixel electrode on the via insulation layer. 15 . The transparent display device of claim 14 , wherein the pixel defining layer is selectively disposed in the pixel area and does not extend to the transmission area. 16 . The transparent display device of claim 15 , wherein the opposing electrode is disposed along surfaces of the pixel defining layer and the display layer, and a sidewall and a bottom face of the transmitting window, and wherein a thickness of a portion of the opposing electrode on the sidewall and the bottom face of the transmitting window is smaller than a thickness of a portion of the opposing electrode on the surfaces of the pixel defining layer and the display layer. 17 . The transparent display device of claim 14 , wherein the opposing electrode is selectively disposed in the pixel area and does not extend to the transmission area. 18 . A method of manufacturing a transparent display device, the method comprising: providing a base substrate including a pixel area and a transmission area; forming an adhesive layer on the base substrate using aluminum oxide; forming a barrier layer on the adhesive layer using silicon oxynitride; forming a pixel circuit on the barrier layer; forming an insulation layer covering the pixel circuit on the barrier layer; and forming a display structure on the insulation layer. 19 . The method of claim 18 , wherein the adhesive layer has a compressive stress therein. 20 . The method of claim 18 , wherein the forming the pixel circuit includes: forming a semiconductor layer on the barrier layer; and performing a crystallization process on the semiconductor layer, wherein the crystallization process is performed at a temperature in a range of about 380 degrees Celsius to about 500 degrees Celsius.
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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