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US-2024414942-A1 · Dec 12, 2024 · US
US8946702B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8946702-B2 |
| Application number | US-201313860792-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 11, 2013 |
| Priority date | Apr 13, 2012 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.
Opening claim text (preview).
The invention claimed is: 1. A semiconductor device comprising: a first gate electrode layer over an insulating surface; a first insulating layer over the first gate electrode layer; oxide semiconductor stacked layers comprising a first oxide semiconductor layer and a second oxide semiconductor layer and overlapping with the first gate electrode layer with the first insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers;…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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