Thin film transistor, pixel structure, and method for manufacturing the same, array substrate and display device

Patent metadata

Field	Value
Publication number	US-2016365361-A1
Application number	US-201515120736-A
Country	US
Kind code	A1
Filing date	Sep 8, 2015
Priority date	Feb 4, 2015
Publication date	Dec 15, 2016
Grant date	—

Abstract

A thin film transistor, a pixel structure, an array substrate, a display device, a method for manufacturing a thin film transistor, and a method for manufacturing a pixel structure are disclosed. The thin film transistor includes a gate electrode, a source electrode and a drain electrode, wherein a first passivation layer made from an aluminum oxide material is provided on the source electrode and the drain electrode, and an active layer made from an aluminum oxide material doped with ions is provided in a region of the first passivation layer corresponding to the gate electrode. Since the first passivation layer as insulation material is doped with the ions to form an active layer, the etching stop layer may be omitted, thereby simplifying the structure of the thin film transistor.

First claim

1 . A thin film transistor, comprising a gate electrode, a source electrode and a drain electrode, wherein a first passivation layer made from an aluminum oxide material is provided on the source electrode and the drain electrode, and an active layer made from an aluminum oxide material doped with ions is provided in a region of the first passivation layer corresponding to the gate electrode.

2 . The thin film transistor according to claim 1 , wherein the ions comprise gallium ions and tin ions so that the doped aluminum oxide material forms an aluminum-gallium-tin oxide.

3 . The thin film transistor according to claim 1 , wherein the thin film transistor is a bottom gate thin film transistor, and two sides of the active layer cover edges of respective sides of the source electrode and the drain electrode away from the gate electrode, respectively.

4 . The thin film transistor according to claim 1 , wherein a second passivation layer is provided on the first passivation layer.

5 . A pixel structure, comprising:
a substrate; a driving thin film transistor provided on the substrate, the driving thin film transistor being the thin film transistor according to claim 1 ; and a switching thin film transistor provided on the substrate, the switching thin film transistor being the thin film transistor according to claim 1 , wherein the drain electrode of the switching thin film transistor is electrically connected to the gate electrode of the driving thin film transistor.

6 . The pixel structure according to claim 5 , wherein the source electrode and the drain electrode of the switching thin film transistor and the source electrode and the drain electrode of the driving thin film transistor are made of the same material and provided in the same layer.

7 . The pixel structure according to claim 5 , wherein a second passivation layer is provided on the first passivation layer.

8 . The pixel structure according to claim 7 , further comprising a pixel electrode electrically connected to the drain electrode of the driving thin film transistor through a via hole formed in the first passivation layer and the second passivation layer.

9 . An array substrate, comprising a plurality of pixel structures according to claim 5 .

10 . A display device, comprising the array substrate according to claim 9 .

11 . A method for manufacturing a thin film transistor, comprising a step of forming a thin film transistor on a substrate, wherein the step of forming the thin film transistor on the substrate comprises steps of:
forming a first passivation layer from an aluminum oxide material on a source electrode and a drain electrode of the thin film transistor; and forming an active layer by doping with ions on a region of the first passivation layer corresponding to a gate electrode of the thin film transistor.

12 . (canceled)

13 . The method according to claim 11 , wherein the step of forming the thin film transistor on the substrate further comprises steps of:
forming the gate electrode on the substrate; forming a gate insulation layer on the substrate formed with the gate electrode; and forming the source electrode and the drain electrode on the gate insulation layer.

14 . The method according to claim 11 , wherein the step of forming the active layer by doping with the ions on the region of the first passivation layer corresponding to the gate electrode of the thin film transistor comprises steps of:
forming a second passivation layer on the first passivation layer; and implanting gallium ions and tin ions into the region of the first passivation layer corresponding to the gate electrode through the second passivation layer.

15 . The method according to claim 14 , wherein the step of forming the active layer by doping with the ions on the region of the first passivation layer corresponding to the gate electrode of the thin film transistor further comprises a step of:
forming a photoresist layer on the second passivation layer, so as to implant the gallium ions and the tin ions through the photoresist layer and the second passivation layer.

16 . The method according to claim 11 , wherein two sides of the active layer are formed to cover edges of respective sides of the source electrode and the drain electrode away from the gate electrode, respectively.

17 . A method for manufacturing a pixel structure, comprising a step of forming a switching thin film transistor and a driving thin film transistor on a substrate, wherein the step of forming the switching thin film transistor and the driving thin film transistor on the substrate comprises steps of:
forming a first passivation layer from an aluminum oxide material on source electrodes and drain electrodes of the switching thin film transistor and the driving thin film transistor; and forming active layers of the switching thin film transistor and the driving thin film transistor by doping with ions on regions of the first passivation layer corresponding to respective gate electrodes of the switching thin film transistor and the driving thin film transistor, respectively.

18 . The method according to claim 17 , wherein the step of forming the switching thin film transistor and the driving thin film transistor on the substrate further comprises steps of:
forming the gate electrodes of the switching thin film transistor and the driving thin film transistor on the substrate; forming a gate insulation layer on the substrate formed with the gate electrodes, and forming a first via hole in a position of the gate insulation layer corresponding to the gate electrode of the driving thin film transistor; forming an electrically conductive layer on the gate insulation layer; and forming the source electrodes and the drain electrodes of the switching thin film transistor and the driving thin film transistor by means of the electrically conductive layer by a patterning process, respectively, wherein the drain electrode of the switching thin film transistor is electrically connected to the gate electrode of the driving thin film transistor through the first via hole.

19 . The method according to claim 17 or 18 , wherein the step of forming the active layers of the switching thin film transistor and the driving thin film transistor by doping with the ions on the regions of the first passivation layer corresponding to the respective gate electrodes of the switching thin film transistor and the driving thin film transistor respectively comprises steps of:
forming a second passivation layer on the first passivation layer; and
implanting gallium ions and tin ions into the regions of the first passivation layer corresponding to the respective gate electrodes of the switching thin film transistor and the driving thin film transistor through the second passivation layer, respectively.

20 . The method according to claim 19 , wherein the step of forming the active layers of the switching thin film transistor and the driving thin film transistor by doping with the ions on the regions of the first passivation layer corresponding to the respective gate electrodes of the switching thin film transistor and the driving thin film transistor respectively further comprises steps of:
forming a photoresist layer on the second passivation layer; partially exposing regions of the photoresist layer corresponding to the respective gate electrodes of the switching thin film transistor and the driving thin film transistor by using a half-tone mask or a gray-tone mask, and fully exposing a re

Assignees

• Boe Technology Group Co Ltd

Inventors

• Jiang Chunsheng

Classifications

• H10P30/22

  using masks · CPC title

• H10P14/69391

  the material containing aluminium, e.g. Al2O3 · CPC title

• H10P14/6518

  by introduction of substances into an already-existing insulating layer · CPC title

• H10P14/20

  of semiconductor materials · CPC title

• H10D84/01

  Manufacture or treatment · CPC title