Thermal management assembly

Patent metadata

Field	Value
Publication number	US-2016357233-A1
Application number	US-201415120511-A
Country	US
Kind code	A1
Filing date	Apr 30, 2014
Priority date	Apr 30, 2014
Publication date	Dec 8, 2016
Grant date	—

Abstract

A thermal management assembly in accordance with one example may include a first thermal management member that includes a first main region that is continuous, a first connection region that is discontinuous, and a first top side. The thermal management assembly may also include a second thermal management member that includes a second main region, a second connection region, and a second top side. The second main region and the second connection region are continuous. The thermal management assembly may further include a connection member to couple the first thermal management member and the second thermal management member to a memory device via the first connection region and the second connection region. The first top side and the second top side are substantially level with a top side of the memory device in a horizontal direction when the first thermal management member and the second thermal management member are coupled to the memory device.

First claim

What is claimed is:

1 . A thermal management assembly comprising:
a first thermal management member including:
a first main region that is continuous;
a first connection region that is discontinuous; and
a first top side;
a second thermal management member including:
a second main region;
a second connection region, wherein the second main region and the second connection region are continuous; and
a second top side; and
a connection member to couple the first thermal management member and the second thermal management member to a memory device via the first connection region and the second connection region, and wherein the first top side and the second top side are substantially level with a top side of the memory device in a horizontal direction when the first thermal management member and the second thermal management member are coupled to the memory device.

2 . The thermal management assembly of claim 1 , wherein the first connection region includes first a recess and an opening, wherein the second connection region includes a second recess and a connection tab, and wherein the connecting tab is receivable in the opening.

3 . The thermal management assembly of claim 1 , wherein the first main region is devoid of a through opening.

4 . The thermal management assembly of claim 1 , wherein the second thermal management member is devoid of a through opening.

5 . The thermal management assembly of claim 1 , wherein the first top side has substantially the same thickness as the first main region, and wherein the second top side has substantially the same thickness as the second main region.

6 . The thermal management assembly of claim 1 , wherein the first top side and the second top side are substantially flat.

7 . The thermal management assembly of claim 1 , wherein the memory device includes a dual in-line memory module that is compliant with a double data rate 4 (DDR4) protocol.

8 . A method comprising:
aligning an opening of a first connection region of a first thermal management member to an upper notch of a memory device, wherein the first connection region is discontinuous, and wherein the first thermal management member includes a first main region that is continuous and a first top side; inserting a connection tab of a second connection region of a second thermal management member into the opening and the upper notch, wherein the second thermal management member includes a second main region and a second top side, wherein the second main region and the second connection region are continuous, and wherein the first top side and the second top side are substantially flush with a top side of the memory device in a horizontal direction; and inserting a connection member into the first connection region and the second connection region to couple the first thermal management member and the second thermal management member to the memory device.

9 . The method of claim 8 , further comprising coupling a liquid cooling plate to the first top side, the second top side, and the top side of the memory device, wherein the first top side, the second top side, and the top side of the memory device are substantially flat.

10 . The method of claim 8 , wherein the first main region is devoid of a through opening, and wherein the second thermal management member is devoid of a through opening.

11 . The method of claim 8 , further comprising:
inserting the memory device coupled to the first thermal management member and to the second thermal management member into a memory device socket, wherein the memory device socket includes a retention clip; and inserting the retention clip into a lower notch of the memory device.

12 . An apparatus comprising:
a memory device including an upper notch and a lower notch; a thermal management assembly? coupled to the memory device via the upper notch, wherein the thermal management assembly includes:
a first thermal management member including:
a first main region that is continuous;
a first connection region that is discontinuous; and
a first top side;

a second thermal management member including:
a second main region;
a second connection region, wherein the second main region and the second connection region are continuous; and
a second top side;

a connection member to couple the first thermal management member and the second thermal management member to the memory device, wherein the first top side and the second top side are substantially flush with a top side of the memory device; and
a memory device socket electrically coupled to the memory device, wherein the memory device socket includes a retention clip receivable in the lower notch.

13 . The apparatus of claim 12 , wherein the first top side has substantially the same thickness as the first main region, and wherein the second top side has substantially the same thickness as the second main region.

14 . The apparatus of claim 12 , wherein the first top side and the second top side are substantially flat.

15 . The apparatus of claim 12 , wherein the memory device includes a dual in-line memory module that is compliant with a double data rate 4 (DDR4) protocol.

Assignees

• Hewlett Packard Entpr Dev Lp

Inventors

• Bowden Thomas Robert
• DOERR Allen B
• Franz John
• Benedict Melvin K
• Allen Joseph
• Norton John
• Nguyen Binh

Classifications

• H10W40/641

  Snap-on arrangements, e.g. clips · CPC title

• H10W40/22

  characterised by their shape, e.g. having conical or cylindrical projections · CPC title

• G06F1/20 Primary

  Cooling means · CPC title

• G06F13/42

  Bus transfer protocol, e.g. handshake; Synchronisation · CPC title

• G06F1/206 Primary

  comprising thermal management · CPC title