Method for forming conductor layer, and method for producing multilayer wiring substrate using same

US2016353580A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016353580-A1
Application numberUS-201515113234-A
CountryUS
Kind codeA1
Filing dateJan 21, 2015
Priority dateJan 22, 2014
Publication dateDec 1, 2016
Grant date

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method for forming a conductor layer, including subjecting a surface of a polyimide film where a polyimide layer (a) is formed to polyimide etching treatment, to remove at least part of the polyimide layer (a), the polyimide film having the polyimide layer (a) formed on one surface or both surfaces of a polyimide layer (b); and then forming a conductor layer on the surface, such that the polyimide etching treatment time T (min), which is represented using t (min) defined by the formula as described below, is within the range of 0.2t≦T≦5t. t  ( min ) = Thickness   of   polyimide   layer   ( a )  ( μ   m ) Etching   rate   in   the   direction   of  thickness   of    polyimide   layer   ( a )  (μm/min)

First claim

Opening claim text (preview).

1 . A method for forming a conductor layer, comprising: subjecting a surface of a polyimide film where a polyimide layer (a) is formed to polyimide etching treatment, to remove at least part of the polyimide layer (a), wherein the polyimide film has the polyimide layer (a) formed on one surface or both surfaces of a polyimide layer (b); and then forming a conductor layer on the surface, wherein the polyimide etching treatment time T (min), which is represented using t (min) defined by the formula as described below, is within the range of 0.2t≦T≦5t. t  ( min ) = Thickness   of   polyimide   layer   ( a )  ( μ   m ) Etching   rate   in   the   direction   of  thickness   of    polyimide   layer   ( a )  (μm/min) 2 . The method for forming a conductor layer according to claim 1 , wherein the polyimide layer (b) consists essentially of a polyimide obtained using a 3,3′,4,4′-biphenyltetracarboxylic acid compound in an amount of 90 mol % or more as the tetracarboxylic acid component, and 4,4′-diaminodiphenyl ether and/or p-phenylenediamine in an amount of 90 mol % or more as the diamine component, and the polyimide layer (a) consists essentially of a polyimide obtained using a 3,3′,4,4′-biphenyltetracarboxylic acid compound, a 2,3,3′,4′-biphenyltetracarboxylic acid compound, a pyromellitic acid compound, or a plurality of compounds selected from these compounds as the tetracarboxylic acid component, and p-phenylenediamine, 4,4′-diaminodiphenyl ether, 4,4′-diaminodiphenyl methane, 2,2-bis(4-aminophenyl)propane, 1,3-bis(4-aminophenoxy benzene), 1,4-bis(4-aminophenoxy)benzene, 4,4′-bis(4-aminophenyl)diphenyl ether, 4,4′-bis(4-aminophenyl)diphenyl methane, 4,4′-bis(4-aminophenoxy)diphenyl ether, 4,4′-bis(4-aminophenoxy)diphenyl methane, 2,2-bis[4-(aminophenoxy)phenyl]propane, or a plurality of compounds selected from these compounds as the diamine component, with the proviso that a polyimide obtained using 3,3′,4,4′-biphenyltetracarboxylic acid compound in an amount of 90 mol % or more as the tetracarboxylic acid component, and 4,4′-diaminodiphenyl ether and/or p-phenylenediamine in an amount of 90 mol % or more as the diamine component is excluded. 3 . The method for forming a conductor layer according to claim 1 , wherein the polyimide layer (a) consists of polyimide obtained from a polyimide precursor composition comprising any one or more of an aminosilane compound, an epoxysilane compound, an aluminum compound, or a titanate compound. 4 . The method for forming a conductor layer according to claim 1 , wherein the chemical etching rate of the polyimide constituting the polyimide layer (b) with a polyimide etching solution is lower than the chemical etching rate of the polyimide constituting the polyimide layer (a) with the polyimide etching solution. 5 . The method for forming a conductor layer according to claim 1 , wherein the thickness of the polyimide layer (b) is 1 μm to 100 μm, and the thickness of the polyimide layer (a) is 0.05 μm to 5 μm. 6 . The method for forming a conductor layer according to claim 1 , wherein the polyimide film is a polyimide film obtained by applying a polyimide precursor solution, which is to be formed into the polyimide layer (a), to at least one surface of a self-supporting film obtained from a polyimide precursor solution, which is to be formed into the polyimide layer (b); and then subjecting the film to heat treatment at a temperature of 350° C. to 600° C. 7 . The method for forming a conductor layer according to claim 1 , wherein the polyimide etching treatment is wet etching treatment with a polyimide etching solution, or dry etching treatment by plasma treatment. 8 . The method for forming a conductor layer according to claim 1 , wherein a metal film layer as the conductor layer is formed on the surface of the polyimide film by electroless plating. 9 . A method for producing a multilayer wiring substrate, comprising: laminating a polyimide film onto a printed wiring board in which a conductor wiring pattern is formed on an insulation substrate; forming a via to the conductor wiring patt

Assignees

Inventors

Classifications

  • Multilayer circuits · CPC title

  • H05K3/181Primary

    by electroless plating (adhesives therefor H05K3/387) · CPC title

  • Etching · CPC title

  • Etching of the substrate by chemical or physical means · CPC title

  • Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources (plasma generation in general H05H1/24) · CPC title

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What does patent US2016353580A1 cover?
A method for forming a conductor layer, including subjecting a surface of a polyimide film where a polyimide layer (a) is formed to polyimide etching treatment, to remove at least part of the polyimide layer (a), the polyimide film having the polyimide layer (a) formed on one surface or both surfaces of a polyimide layer (b); and then forming a conductor layer on the surface, such that the poly…
Who is the assignee on this patent?
Ube Industries
What technology area does this patent fall under?
Primary CPC classification H05K3/181. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).