Utilizing a processor with a time of day clock error

Patent metadata

Field	Value
Publication number	US-2016283334-A1
Application number	US-201514867049-A
Country	US
Kind code	A1
Filing date	Sep 28, 2015
Priority date	Mar 25, 2015
Publication date	Sep 29, 2016
Grant date	—

Abstract

Aspects of the present invention disclose a method for core utilization. The method includes identifying a faulty clock in a core of a plurality of cores. The method further includes initiating a recovery procedure of the faulty clock in the affected core. The method further includes determining that the recovery of the faulty clock was not successful. The method further includes adjusting the functionality of the core with the faulty clock.

First claim

What is claimed is:

1 . A computer program product for core utilization, based on core clocks, the method comprising:
one or more computer readable storage media; and program instructions stored on the one or more computer readable storage media, the program instructions comprising:
program instructions to identify a faulty clock, in a core of a plurality of cores in a multi-core computing system;
program instructions to initiate a recovery procedure for the faulty clock in the core of the plurality of cores;
program instructions to determine that the faulty clock, in the core of the plurality of cores, was not recovered; and
program instructions to adjust functionality of the core, of the plurality of cores, with the faulty clock.

2 . The computer program product of claim 1 , wherein the program instructions to identify a faulty clock, in a core of a plurality of cores, in a multi-core computing system comprises:
determining that all clocks in the multi-core computing system are not synchronized; and verifying that a system clock in the multi-core computing system is functioning correctly.

3 . The computer program product of claim 2 , wherein the faulty clock, in the core of the plurality of cores, is not synchronized with the system clock.

4 . The computer program product of claim 2 , wherein the program instructions to verify that the system clock in the multi-core computing system is functioning correctly comprises:
executing an internal check to verify integrity of a time of day value as seen by each core in the multi-core computing system.

5 . The computer program product of claim 1 , wherein the recovery procedure includes one of the following: a redundant clock topology; a redundant oscillator; and a redundant master clock.

6 . The computer program product of claim 2 , wherein the program instructions to determine by one or more processors, that the faulty clock, in the core of the plurality of cores, was not recovered comprises:
checking whether the faulty clock is synchronized with the system clock.

7 . A computer system for core utilization, based on core clocks, the computer system comprising:
one or more computer processors; one or more computer readable storage media; and program instructions stored on the computer readable storage media for execution by at least one of the one or more processors, the program instructions comprising:
program instructions to identify, by one or more processors, a faulty clock, in a core of a plurality of cores in a multi-core computing system;
program instructions to initiate, by one or more processors, a recovery procedure for the faulty clock in the core of the plurality of cores;
program instructions to determine, by one or more processors, that the faulty clock, in the core of the plurality of cores, was not recovered; and
program instructions to adjust, by one or more processors, functionality of the core, of the plurality of cores, with the faulty clock.

8 . The computer system of claim 7 , wherein the program instructions to identify, by one or more processors, a faulty clock, in a core of a plurality of cores, in a multi-core computing system comprises:
determining that all clocks in the multi-core computing system are not synchronized; and verifying that a system clock in the multi-core computing system is functioning correctly.

9 . The computer system of claim 8 , wherein the faulty clock, in the core of the plurality of cores, is not synchronized with the system clock.

10 . The computer system of claim 8 , wherein the program instructions to verify that the system clock in the multi-core computing system is functioning correctly comprises:
executing an internal check to verify integrity of a time of day value as seen by each core in the multi-core computing system.

11 . The computer system of claim 7 , wherein the recovery procedure includes one of the following: a redundant clock topology; a redundant oscillator; and a redundant master clock.

12 . The computer system of claim 8 , wherein the program instructions to determine by one or more processors, that the faulty clock, in the core of the plurality of cores, was not recovered comprises:
checking whether the faulty clock is synchronized with the system clock.

Assignees

• IBM

Inventors

• Gupta Sachin
• Jha Prem S
• Sainath Venkatesh

Classifications

• G06F11/1679

  at clock signal level · CPC title

• G06F11/1604 Primary

  where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware · CPC title

• G06F11/1497

  Time redundant execution of software on a single processing unit · CPC title

• G06F11/0757

  by exceeding a time limit, i.e. time-out, e.g. watchdogs · CPC title