Method of Semiconductor Fabrication with Height Control Through Active Region Profile

US2016240444A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016240444-A1
Application numberUS-201514975525-A
CountryUS
Kind codeA1
Filing dateDec 18, 2015
Priority dateFeb 13, 2015
Publication dateAug 18, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present disclosure provides a method for fabricating an integrated circuit in accordance with some embodiments. The method includes forming a trench on a semiconductor substrate, thereby defining fin active regions; extracting a profile of the fin active regions; determining an etch dosage according to the profile of the fin active regions; filling in the trench with a dielectric material; and performing an etching process to the dielectric material using the etch dosage, thereby recessing the dielectric material and defining a fin height of the fin active regions.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method, comprising: forming a trench on a semiconductor substrate, thereby defining fin active regions; extracting a profile of the fin active regions; determining an etch dosage according to the profile of the fin active regions; filling in the trench with a dielectric material; and performing an etching process to the dielectric material using the etch dosage, thereby recessing the dielectric material and defining a fin height of the fin active regions. 2 . The method of claim 1 , wherein the performing of the etching process to the dielectric material using the etch dosage includes forming the fin active regions with the fin height having a fin height loading that ranges between 1 nm and 3 nm. 3 . The method of claim 1 , wherein the forming of the trench includes forming an etch mask on the semiconductor substrate using a lithography process; and etching the semiconductor substrate through openings of the etch mask. 4 . The method of claim 1 , wherein the extracting of the profile of the fin active regions includes measuring a sidewall angle of the trench. 5 . The method of claim 4 , wherein the measuring of the sidewall angle includes measuring the sidewall angle by a scatterometry-based optical critical dimension metrology (OCD). 6 . The method of claim 1 , wherein the determining of the etch dosage includes determining the etch dosage according to the profile of the fin active region and a desired fin height. 7 . The method of claim 1 , wherein the filling of the trench with the dielectric material includes depositing the dielectric material in the trench and performing a chemical mechanical polishing process to the dielectric material. 8 . The method of claim 1 , where the etch dosage includes an etch duration with a given etchant. 9 . The method of claim 1 , further comprising: forming a second trench on a second semiconductor substrate, thereby defining second fin active regions; extracting a second profile of the second fin active regions; adjusting the etch dosage if the second profile is different from the profile; filling in the second trench with the dielectric material; and performing a second etching process to the dielectric material using the adjusted etch dosage, thereby recessing the dielectric material and defining the second fin active regions of the height. 10 . A method, comprising: forming first trenches on a substrate, thereby defining first ridge features on the substrate; measuring a sidewall angle (SWA) of the first ridge features; determining an etch dosage according to the SWA and a desired height; filling in the first trench with a material; and performing an etching process to the material with the etch dosage, thereby recessing the material and defining the first ridge features having the desired height. 11 . The method of claim 10 , wherein the measuring of SWA of the first ridge feature includes measuring multiple locations on the substrate and generating an averaging SWA; and the determining of the etch dosage includes determining the etch dosage according to the average SWA and the desired height. 12 . The method of claim 10 , wherein the measuring of the sidewall angle includes measuring the sidewall angle by a scatterometry-based optical critical dimension metrology (OCD). 13 . The method of claim 10 , wherein the determining of the etch dosage includes adjusting the etch dosage according to a variation of the SWA. 14 . The method of claim 10 , wherein the determining of the etch dosage includes checking a lookup table of paired SWAs and etch dosages; and selecting one of the etch dosages corresponding to one of the paired SWA most close to the measured SWA. 15 . The method of claim 10 , wherein the determining of the etch dosage includes determining the etch dosage according to the measured SWA and using a formula that relates the etch dosage as a function of the measured SWA. 16 . The method of claim 10 , wherein the filling of the trench includes depositing a dielectric material in the trench and performing a chemical mechanical polishing process to the dielectric material. 17 . The method of claim 10 , where the etch dosage includes an etch duration for a given etching process with a given etchant. 18 . A system for semiconductor fabrication, comprising: a metrology tool operable to measure profile of a fin active region formed on a semiconductor substrate; an etch apparatus operable to perform an etching process to the semiconductor substrate; and a manufacturing module coupled with the metrology tool and the etch apparatus, wherein the manufacturing module is designed to determine an etch dosage based on the profile of the fin active region. 19 . The system of claim 18 , wherein the manufacturing module further includes a database for maintaining production specifications and etching recipes; a fin profile extraction (FPE) module coupled with the metrology tool to determine a sidewall angle (SWA) of the fin active region; and an etch dosage module coupled with the FPE module and the database, wherein the etch dose module is designed to determine the etch dosage according to the SWA from the FPE module and a desired fin height from corresponding etching recipe of the database. 20 . The system of claim 18 , wherein the database further includes a lookup table pairing various SWAs and corresponding etch dosages.

Assignees

Inventors

Classifications

  • Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

  • using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

  • H10P74/23Primary

    characterised by multiple measurements, corrections, marking or sorting processes · CPC title

  • Apparatus for manufacture or treatment · CPC title

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What does patent US2016240444A1 cover?
The present disclosure provides a method for fabricating an integrated circuit in accordance with some embodiments. The method includes forming a trench on a semiconductor substrate, thereby defining fin active regions; extracting a profile of the fin active regions; determining an etch dosage according to the profile of the fin active regions; filling in the trench with a dielectric material; …
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P74/23. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 18 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).