Manufacturing method for semiconductor structure
US-12165910-B2 · Dec 10, 2024 · US
Method for forming self-aligned contacts/vias with high corner selectivity
US9105700B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105700-B2 |
| Application number | US-201314105073-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 12, 2013 |
| Priority date | Dec 12, 2013 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
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A method of etching self-aligned contact/via features in a low-k dielectric layer disposed below a hardmask, which is disposed below a planarization layer. At least one cycle is provided, where each cycle comprises thinning the planarization layer, forming a deposition layer on the hardmask and planarization layer; and etching the low-k dielectric layer masked by the deposition layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of etching self-aligned contact/via features in a dielectric layer disposed below a hardmask, which is disposed below a planarization layer, comprising at least one cycle, wherein each cycle comprises: thinning the planarization layer; forming a deposition layer on the hardmask and planarization layer; and etching the dielectric layer masked by the deposition layer. 2. The method, as recited in claim 1 , wherein the etchin…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9105700B2 cover?
- A method of etching self-aligned contact/via features in a low-k dielectric layer disposed below a hardmask, which is disposed below a planarization layer. At least one cycle is provided, where each cycle comprises thinning the planarization layer, forming a deposition layer on the hardmask and planarization layer; and etching the low-k dielectric layer masked by the deposition layer.
- Who is the assignee on this patent?
- Lam Res Corp
- What technology area does this patent fall under?
- Primary CPC classification H10P50/283. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).