Method of manufacturing a semiconductor device including through silicon plugs

Patent metadata

Field	Value
Publication number	US-2016197014-A1
Application number	US-201615069474-A
Country	US
Kind code	A1
Filing date	Mar 14, 2016
Priority date	Apr 5, 2010
Publication date	Jul 7, 2016
Grant date	—

Abstract

A method of making a semiconductor device is provided including forming a first opening and a second opening in a first surface of a substrate. A conductive material is formed in the first opening and in the second opening and over the first surface in the first region of the substrate between the openings. A thickness of the substrate may be reduced from a second surface of the substrate, opposite the first surface, to a third surface opposite the first surface which exposes the conductive material in the first opening and the conductive material in the second opening. A light emitting diode (LED) device is connected to the third surface of the substrate.

First claim

1 . A method of making a semiconductor device, the method comprising:
forming a first opening and a second opening in a first surface of a substrate wherein a first region of the substrate having the first surface interposes the first and second openings; forming a conductive material in the first opening and in the second opening and over the first surface in the first region of the substrate; reducing a thickness of the substrate from a second surface of the substrate, opposite the first surface, to a third surface opposite the first surface which exposes the conductive material in the first opening and the conductive material in the second opening; and connecting a light emitting diode (LED) device to the third surface of the substrate.

2 . The method of claim 1 , wherein the forming the conductive material further includes depositing the conductive material in a third opening spaced a second region from the second opening, wherein the conductive material is not disposed on a portion of the top surface of the second region.

3 . The method of claim 1 , further comprising:
forming an isolation layer in the first opening and in the second opening prior to forming the conductive material.

4 . The method of claim 1 , further comprising:
forming a glue layer on the first conductive material nearest the first surface of the substrate.

5 . The method of claim 4 , wherein the glue layer is disposed directly on the first conductive material.

6 . The method of claim 1 , further comprising:
forming a glue layer directly on the conductive material and on the portion of the top surface in the second region.

7 . The method of claim 4 , further comprising:
attaching a second substrate using the glue layer.

8 . A method of fabricating a semiconductor device, comprising:
etching a first surface of a substrate to form a first opening and a second opening, wherein the first opening is a double-sided comb shape and the second opening is a double-sided comb shape spaced a distance from the first opening; forming an isolation layer in each of the first and openings; forming a conductive material in the first and second openings; forming a metal layer on the conductive material in the first and second openings, wherein the metal layer extends laterally beyond the first and second openings; and disposing a semiconductor chip on the metal layer.

9 . The method of claim 8 , wherein the semiconductor chip is a light emitting diode (LED) chip.

10 . The method of claim 8 , wherein the disposing the semiconductor chip includes disposing the semiconductor chip on the first and second opening such that portions of the double-sided comb shape extend beyond an edge of the semiconductor chip.

11 . The method of claim 8 , wherein the forming the metal layer includes a plating a copper layer over the substrate and the conductive material.

12 . The method of claim 8 , wherein the forming the isolation layer includes chemical vapor deposition forming a dielectric layer.

13 . The method of claim 8 , further comprising:
depositing a seed layer after the isolation layer and prior to the conductive material in the first and second openings.

14 . A method of making a semiconductor device, the method comprising:
providing a substrate having a first surface and an opposing second surface; etching the first surface of a substrate to form a first opening and a second opening; forming a conductive material in both of the first opening and the second opening, wherein each of the conductive material has a first end adjacent the first surface of the substrate and a second end opposing end, wherein the first end of the conductive material in the first opening is connected to the first end of the conductive material in the second opening by a portion of the conductive material that is disposed on the first surface of the substrate; forming a metal pad over the second surface of the substrate, wherein the metal pad is electrically connected to the conductive material in the first opening and the conductive material in the second opening; and bonding a device to the metal pad.

15 . The method of claim 14 , wherein etching the substrate to form the first opening and the second opening comprises forming the first opening as a circular shape and forming a second opening as a ring shape surrounding and concentric with the first opening.

16 . The method of claim 14 , wherein etching the substrate to form the first opening and the second opening comprises forming two adjacent double-sided comb shapes.

17 . The method of claim 14 , wherein etching the substrate to form the first opening and the second opening comprises forming two adjacent rectangular shape openings.

18 . The method of claim 14 , wherein the forming the metal pad includes forming a seed layer directly on the second end of the conductive material in each of the first and second openings.

19 . The method of claim 14 , further comprising:
etching a third opening in the first surface of the substrate; and forming the conductive material in the third opening, wherein the conductive material in the third opening is electrically isolated from the conductive material in the first and second openings.

20 . The method of claim 14 , further comprising:
forming another metal pad on the conductive material in the third opening, wherein the metal pad is adjacent the second surface.

Assignees

• Taiwan Semiconductor Mfg

Inventors

• Yu Chen-Hua
• Chang Hung-Pin
• Lin Yung-Chi
• Yu Chia-Lin
• Hung Jui-Pin
• Hwang Chien Ling

Classifications

• H10W20/2134

  TSVs extending from the semiconductor wafer into back-end-of-line layers · CPC title

• H10W20/2128

  Coaxial through-semiconductor vias · CPC title

• H10W20/2125

  Top-view shapes · CPC title

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title